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PDF IRSM836-035MA Data sheet ( Hoja de datos )
| Número de pieza | IRSM836-035MA | |
| Descripción | Integrated Power Module | |
| Fabricantes | International Rectifier | |
| Logotipo |  |
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IRSM836-035MA
3A, 500V
Integrated Power Module for
Small Appliance Motor Drive Applications
Description
IRSM836-035MA is a 3A, 500V Integrated Power Module (IPM) designed for advanced appliance motor drive
applications such as energy efficient fans and pumps. IR's technology offers an extremely compact, high
performance AC motor-driver in an isolated package. This advanced IPM offers a combination of IR's low RDS(on)
Trench MOSFET technology and the industry benchmark 3-phase high voltage, rugged driver in a small PQFN
package. At only 12x12mm and featuring integrated bootstrap functionality, the compact footprint of this surface-
mount package makes it suitable for applications that are space-constrained. Integrated over-current protection,
fault reporting and under-voltage lockout functions deliver a high level of protection and fail-safe operation.
IRSM836-035MA functions without a heat sink.
Features
• Integrated gate drivers and bootstrap functionality
• Open-source for leg-shunt current sensing
• Protection shutdown pin
• Low RDS(on) Trench FREDFET
• Under-voltage lockout for all channels
• Matched propagation delay for all channels
• Optimized dV/dt for loss and EMI trade offs
• 3.3V Schmitt-triggered active high input logic
• Cross-conduction prevention logic
• Motor power range up to ~110W, without heat sink
• Isolation 1500VRMS min
IRSM836-035MA
Base Part Number
Package Type
IRSM836-035MA
36L
PQFN 12 x 12 mm
All part numbers are PbF
Standard Pack
Form
Tape and Reel
Tray
Quantity
2000
800
Orderable Part Number
IRSM836-035MATR
IRSM836-035MA
1 www.irf.com
© 2013 International Rectifier
February 3, 2013
Free Datasheet http://www.datasheet4u.com/
1 page  
IRSM836-035MA
Qualification Information†
Qualification Level
Moisture Sensitivity Level
ESD
Machine Model
Human Body Model
Industrial††
(per JEDEC JESD 47E)
MSL3†††
(per IPC/JEDEC J-STD-020C)
Class B
(per JEDEC standard JESD22-A115)
Class 2
(per standard ESDA/JEDEC JS-001-2012)
RoHS Compliant
Yes
† Qualification standards can be found at International Rectifier’s web site http://www.irf.com/
†† Higher qualification ratings may be available should the user have such requirements. Please contact
your International Rectifier sales representative for further information.
††† Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
5 www.irf.com
© 2013 International Rectifier
February 3, 2013
Free Datasheet http://www.datasheet4u.com/
5 Page 
IRSM836-035MA
Fault Reporting and Programmable Fault Clear Timer
The IRSM836-035MA provides an integrated fault reporting output and an adjustable fault clear timer.
There are two situations that would cause the IRSM836-035MA to report a fault via the FAULT pin. The first is an
under-voltage condition of VCC and the second is when the ITRIP pin recognizes a fault. Once the fault condition
occurs, the FAULT pin is internally pulled to VSS and the fault clear timer is activated. The fault output stays in the
low state until the fault condition has been removed and the fault clear timer expires; once the fault clear timer
expires, the voltage on the FAULT pin will return to VCC.
The length of the fault clear time period (tFLTCLR) is determined by exponential charging characteristics of
the capacitor where the time constant is set by RRCIN and CRCIN. In Figure 4 where we see that a fault condition
has occurred (UVLO or ITRIP), RCIN and FAULT are pulled to VSS, and once the fault has been removed, the
fault clear timer begins. Figure 5 shows that RRCIN is connected between the VCC and the RCIN pin, while CRCIN is
placed between the RCIN and VSS pins.
ITRIP
VRCIN
VFAULT
tFLTCLR
VCC
VRCIN,TH
VSS Time
VSS
High
Impedance State
Time
Figure 4: RCIN and FAULT pin waveforms
V cc
HIN (x3)
LIN (x3)
IRSM836-035MA
EN
FAULT
VB ( x3)
VS (x3)
R RCIN
RCIN
CRCIN
ITRIP
VSS
VRx
I-
Figure 5: Programming the fault clear timer
The design guidelines for this network are shown in Table 1.
CRCIN
≤1 nF
Ceramic
RRCIN
0.5 MΩ to 2 MΩ
>> RON,RCIN
Table 1: Design guidelines
The length of the fault clear time period can be determined by using the formula below.
( )tFLTCLR = − R CRCIN RCIN
ln1 −
VRCIN ,TH
VCC
11 www.irf.com
© 2013 International Rectifier
February 3, 2013
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet IRSM836-035MA.PDF ] | |
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