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NVMFD5853NLWF 데이터시트 PDF




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NVMFD5853NLWF 데이터시트, 핀배열, 회로
NVMFD5853NL,
NVMFD5853NLWF
Power MOSFET
40 V, 10 mW, 34 A, Dual NChannel Logic
Level, Dual SO8FL
Features
Small Footprint (5x6 mm) for Compact Designs
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
NVMFD5853NLWF Wettable Flanks Product
AECQ101 Qualified and PPAP Capable
This is a PbFree Device
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value Unit
DraintoSource Voltage
GatetoSource Voltage
Continuous Drain Cur-
r2e,n3t,R4Y) Jmb (Notes 1,
Power Dissipation
RYJmb (Notes 1, 2, 3)
Steady
State
Tmb = 25°C
Tmb = 100°C
Tmb = 25°C
Tmb = 100°C
Continuous Drain Cur-
rent
& 4)
RqJA
(Notes
1,
3
Power Dissipation
RqJA (Notes 1 & 3)
Steady
State
TA = 25°C
TA = 100°C
TA = 25°C
TA = 100°C
Pulsed Drain Current TA = 25°C, tp = 10 ms
Operating Junction and Storage Temperature
VDSS
VGS
ID
PD
ID
PD
IDM
TJ, Tstg
40
"20
34
24
24
12
12
8.5
3.0
1.5
165
55 to
175
V
V
A
W
A
W
A
°C
Source Current (Body Diode)
Single Pulse DraintoSource Avalanche
Energy (TJ = 25°C, VGS = 10 V, IL(pk) = 28.3 A,
L = 0.1 mH, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8from case for 10 s)
IS
EAS
TL
34 A
40 mJ
260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
Parameter
Symbol Value Unit
JunctiontoMounting Board (top) Steady
State (Notes 2, 3)
RYJmb
6.2
JunctiontoAmbient Steady State (Note 3)
JunctiontoAmbient Steady State (min foot-
print)
RqJA
51 °C/W
162
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD5112 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surfacemounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
4. Continuous DC current rating. Maximum current for pulses as long as 1
second are higher but are dependent on pulse duration and duty cycle.
© Semiconductor Components Industries, LLC, 2013
April, 2013 Rev. 3
1
http://onsemi.com
V(BR)DSS
40 V
RDS(on) MAX
10 mW @ 10 V
15 mW @ 4.5 V
ID MAX
34 A
Dual NChannel
D1
D2
G1 G2
S1 S2
1
DFN8 5x6
(SO8FL)
CASE 506BT
MARKING DIAGRAM
D1 D1
S1
G1 5853xx
S2 AYWZZ
G2
D2 D2
D1
D1
D2
D2
5853NL = Specific Device Code
for NVMFD5853NL
5853LW = Specific Device Code
for NVMFD5853NLWF
A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceability
ORDERING INFORMATION
Device
Package Shipping
NVMFD5853NLT1G
DFN8 1500 / Tape &
(PbFree)
Reel
NVMFD5853NLWFT1G DFN8 1500 / Tape &
(PbFree)
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NVMFD5853NL/D
Free Datasheet http://www.datasheet4u.com/




NVMFD5853NLWF pdf, 반도체, 판매, 대치품
NVMFD5853NL, NVMFD5853NLWF
TYPICAL CHARACTERISTICS
1500
1250
Ciss
VGS = 0 V
TJ = 25°C
1000
750
500
Coss
250
Crss
0
0 10 20 30
VDS, DRAINTOSOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
40
1000
100
VDS = 20 V
ID = 15 A
VGS = 4.5 V
tf
td(off)
10
tr
td(on)
1
1 10 100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
100
10
QT
8
6
4 Qgs
Qgd
2 TJ = 25°C
VDS = 32 V
ID = 15 A
0
0 5 10 15 20 25
Qg, TOTAL GATE CHARGE (nC)
Figure 8. GatetoSource and
DraintoSource Voltage vs. Total Charge
70
VGS = 0 V
60 TJ = 25°C
50
40
30
20
10
0
0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00
VSD, SOURCETODRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage vs. Current
10 ms
10
100 ms
VGS = 10 V
1 Single Pulse
TC = 25°C
RDS(on) Limit
Thermal Limit
0.1 Package Limit
0.1
1
1 ms
10 ms
dc
10 100
VDS, DRAINTOSOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
http://onsemi.com
4
Free Datasheet http://www.datasheet4u.com/

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