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PDF K5N1229ACD-BQ12 Data sheet ( Hoja de datos )

Número de pieza K5N1229ACD-BQ12
Descripción MCP Memory
Fabricantes Samsung 
Logotipo Samsung Logotipo



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No Preview Available ! K5N1229ACD-BQ12 Hoja de datos, Descripción, Manual

Rev. 1.0, Jun. 2010
K5N1229ACD-BQ12
MCP Specification
512Mb (32M x16) Muxed Burst, Multi Bank SLC NOR Flash
+ 128Mb (8M x16) Multiplexed Synchronous Burst UtRAM2
datasheet
SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND
SPECIFICATIONS WITHOUT NOTICE.
Products and specifications discussed herein are for reference purposes only. All information discussed
herein is provided on an "AS IS" basis, without warranties of any kind.
This document and all information discussed herein remain the sole and exclusive property of Samsung
Electronics. No license of any patent, copyright, mask work, trademark or any other intellectual property
right is granted by one party to the other party under this document, by implication, estoppel or other-
wise.
Samsung products are not intended for use in life support, critical care, medical, safety equipment, or
similar applications where product failure could result in loss of life or personal or physical harm, or any
military or defense application, or any governmental procurement to which special terms or provisions
may apply.
For updates or additional information about Samsung products, contact your nearest Samsung office.
All brand names, trademarks and registered trademarks belong to their respective owners.
2009 Samsung Electronics Co., Ltd. All rights reserved.
-1-
Free Datasheet http://www.datasheet4u.com/

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K5N1229ACD-BQ12 pdf
datasheetK5N1229ACD-BQ12
3. Pin Configuration
Rev. 1.0
MCP Memory
-1
A NC
B-
C-
D-
E-
F-
G-
H-
J-
K NC
2 3 4 5 6 7 8 9 10 11 12 13
------------
------------
-
NC DNU
-
-
/LBc
/UBc
-
-
A24r
NC
-
-
RDYr
/WAITc
A21rc
VSSrc
CLKrc
VCCrc
/WErc
VPPr
A19rc
A17rc
A22rc
-
-
VCCQrc
A16rc
A20rc
/AVDrc
A23r
/RESETr
/WPr
A18rc
/CEr
VSSQrc
-
-
VSSrc
ADQ7rc
ADQ6rc ADQ13rc ADQ12rc ADQ3rc
ADQ2rc
ADQ9rc
ADQ8rc
/OErc
-
-
ADQ15rc ADQ14rc VSSQrc
ADQ5rc
ADQ4rc ADQ11rc ADQ10rc VCCQrc
ADQ1rc
ADQ0rc
-
-
NC VCCrc
-
-
/CSc
CREc
-
-
DNU
NC
-
------------
------------
14
NC
-
-
-
-
-
-
-
-
NC
56 FBGA: Top View (Ball Down)
NOR + UtRAM
NOR Flash
UtRAM2
Power
Ground
NC/DNU
-5-
Free Datasheet http://www.datasheet4u.com/

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K5N1229ACD-BQ12 arduino
datasheetK5N1229ACD-BQ12
1.0 FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
Vpp
CLK
CE
OE
WE
WP
RESET
RDY
AVD
A16~A24
A/DQ0~
A/DQ15
Bank 0
Address
DXec
Bank 0
Cell Array
Y Dec
I/O
Interface
&
Bank
Control
Bank 1
Address
Bank 15
Address
Y Dec
DXec
Bank 1
Cell Array
X Bank 15
Dec Cell Array
Y Dec
Block
Inform
Erase
Control
Program
Control
Rev. 1.0
MCP Memory
Latch &
Control
Latch &
Control
Latch &
Control
High
Voltage
Gen.
[Table 1] PRODUCT LINE-UP
Mode
Speed Option
VCC=1.7V
-1.95V
Synchronous/Burst
Asynchronous
Max. Initial Access Time (tIAA, ns)
Max. Burst Access Time (tBA, ns)
Max. Access Time (tAA, ns)
Max. CE Access Time (tCE, ns)
Max. OE Access Time (tOE, ns)
1C
(66MHz)
95
11
100
100
15
1D
(83MHz)
95
9
100
100
15
1E
(108MHz)
95
7
100
100
15
1F
(133MHz)
95
6
100
100
15
- 11 -
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