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ADRF6701 데이터시트 PDF




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부품번호 ADRF6701 기능
기능 400 MHz to 1250 MHz Quadrature Modulator
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ADRF6701 데이터시트, 핀배열, 회로
Data Sheet
400 MHz to 1250 MHz Quadrature Modulator with
750 MHz to 1150 MHz Frac-N PLL and Integrated VCO
ADRF6701
FEATURES
IQ modulator with integrated fractional-N PLL
Output frequency range: 400 MHz to 1250 MHz
Internal LO frequency range: 750 MHz to 1150 MHz
Output P1dB: 10.3 dBm @ 1100 MHz
Output IP3: 30.1 dBm @ 1100 MHz
Noise floor: −159.4 dBm/Hz @ 1100 MHz
Baseband bandwidth: 750 MHz (3 dB)
SPI serial interface for PLL programming
Integrated LDOs and LO buffer
Power supply: 5 V/240 mA
40-lead 6 mm × 6 mm LFCSP
APPLICATIONS
Cellular communications systems
GSM/EDGE, CDMA2000, W-CDMA, TD-SCDMA, LTE
Broadband wireless access systems
Satellite modems
GENERAL DESCRIPTION
The ADRF6701 provides a quadrature modulator and
synthesizer solution within a small 6 mm × 6 mm footprint
while requiring minimal external components.
The ADRF6701 is designed for RF outputs from 400 MHz to
1250 MHz. The low phase noise VCO and high performance
quadrature modulator make the ADRF6701 suitable for next
generation communication systems requiring high signal
dynamic range and linearity. The integration of the IQ
modulator, PLL, and VCO provides for significant board
savings and reduces the BOM and design complexity.
The integrated fractional-N PLL/synthesizer generates a 2× fLO
input to the IQ modulator. The phase detector together with an
external loop filter is used to control the VCO output. The VCO
output is applied to a quadrature divider. To reduce spurious
components, a sigma-delta (Σ-Δ) modulator controls the
programmable PLL divider.
The IQ modulator has wideband differential I and Q inputs,
which support baseband as well as complex IF architectures.
The single-ended modulator output is designed to drive a
50 Ω load impedance and can be disabled.
The ADRF6701 is fabricated using an advanced silicon-
germanium BiCMOS process. It is available in a 40-lead,
exposed-paddle, Pb-free, 6 mm × 6 mm LFCSP package.
Performance is specified from −40°C to +85°C. A lead-free
evaluation board is available.
Table 1.
Part No.
ADRF6701
ADRF6702
ADRF6703
Internal LO Range
750 MHz
1150 MHz
1550 MHz
2150 MHz
2100 MHz
2600 MHz
IQ Modulator
±3 dB RF Output Range
400 MHz
1250 MHz
1200 MHz
2400 MHz
1550 MHz
2650 MHz
VCC7
34
VCC6
29
FUNCTIONAL BLOCK DIAGRAM
VCC5
27
VCC4
22
VCC3
17
VCC2
10
VCC1
1
LOSEL 36
ADRF6701
LON 37
LOP 38
BUFFER
DIVIDER
÷2
BUFFER
DATA 12
CLK 13
LE 14
REFIN 6
MUXOUT 8
SPI
INTERFACE
×2
MUX
÷2
÷4
FRACTION
REG
MODULUS
INTEGER
REG
THIRD-ORDER
FRACTIONAL
INTERPOLATOR
N COUNTER
21 TO 123
TEMP
SENSOR
+
PHASE
FREQUENCY
DETECTOR
PRESCALER
÷2
CHARGE PUMP
250µA,
500µA (DEFAULT),
750µA,
1000µA
4 7 11 15 20 21 23 25 28 30 31 35 24
5
GND
NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
NC RSET
Figure 1.
2:1
MUX
DIVIDER
÷2
VCO
CORE
3 39 16 26
CP VTUNE ENOP RFOUT
÷2
0/90
40 DECL3
9 DECL2
2 DECL1
18 QP
19 QN
32 IN
33 IP
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.
Free Datasheet http://www.datasheet4u.com/




ADRF6701 pdf, 반도체, 판매, 대치품
ADRF6701
Parameter
REFERENCE CHARACTERISTICS
REFIN Input Frequency
REFIN Input Capacitance
Phase Detector Frequency
MUXOUT Output Level
MUXOUT Duty Cycle
CHARGE PUMP
Charge Pump Current
Output Compliance Range
PHASE NOISE (FREQUENCY =
800 MHz, fPFD = 38.4 MHz)
Integrated Phase Noise
Reference Spurs
PHASE NOISE (FREQUENCY =
950 MHz, fPFD = 38.4 MHz)
Integrated Phase Noise
Reference Spurs
PHASE NOISE (FREQUENCY =
1100 MHz, fPFD = 38.4 MHz)
Integrated Phase Noise
Reference Spurs
RF OUTPUT HARMONICS
Test Conditions/Comments
REFIN, MUXOUT pins
Low (lock detect output selected)
High (lock detect output selected)
Programmable to 250 μA, 500 μA, 750 μA, 1000 μA
Closed loop operation (see Figure 35 for loop filter design)
10 kHz offset
100 kHz offset
1 MHz offset
10 MHz offset
1 kHz to 10 MHz integration bandwidth
fPFD/2
fPFD
fPFD × 2
fPFD × 3
fPFD × 4
Closed loop operation (see Figure 35 for loop filter design)
10 kHz offset
100 kHz offset
1 MHz offset
10 MHz offset
1 kHz to 10 MHz integration bandwidth
fPFD/2
fPFD
fPFD × 2
fPFD × 3
fPFD × 4
Closed loop operation (see Figure 35 for loop filter design)
10 kHz offset
100 kHz offset
1 MHz offset
10 MHz offset
1 kHz to 10 MHz integration bandwidth
fPFD/2
fPFD
fPFD × 2
fPFD × 3
fPFD × 4
Measured at RFOUT, frequency = 1100 MHz
Second harmonic
Third harmonic
Min Typ
12
4
20
2.7
50
500
1
Data Sheet
Max Unit
160 MHz
pF
40 MHz
0.25 V
V
%
μA
2.8 V
−114
−112
−135
−154
0.09
−113
−101
−99
−108
−99
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
°rms
dBc
dBc
dBc
dBc
dBc
−112
−111
−133
−153
0.11
−113
−106
−104
−100
−107
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
°rms
dBc
dBc
dBc
dBc
dBc
−113
−108
−135
−153
0.12
−112
−93
−93
−105
−103
−61
−73
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
°rms
dBc
dBc
dBc
dBc
dBc
dBc
dBc
Rev. 0 | Page 4 of 36
Free Datasheet http://www.da

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ADRF6701 전자부품, 판매, 대치품
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
Supply Voltage (VCC1 to VCC7)
Digital I/O, CLK, DATA, LE
LOP, LON
IP, IN, QP, QN
REFIN
θJA (Exposed Paddle Soldered Down)1
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
1 Per JDEC standard JESD 51-2.
Rating
5.5 V
−0.3 V to +3.6 V
18 dBm
−0.5 V to +1.5 V
−0.3 V to +3.6 V
35°C/W
150°C
−40°C to +85°C
−65°C to +150°C
ADRF6701
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. 0 | Page 7 of 36
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