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UBA2013T 데이터시트 PDF




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UBA2013T 데이터시트, 핀배열, 회로
UBA2013/L3
HB driver IC with PFC for fluorescent rings
Rev. 00.01 — 23 February 2007
Preliminary data sheet
1. General description
The UBA2013/L3 is a high voltage IC intended to drive and control fluorescent lamps. The
IC can handle both cold and warm ignition of the lamp. It contains a TON-controlled PFC
function, a half bridge controller circuit with level shifter and an internal bootstrap diode to
drive an external half bridge. UBA2013/L3 also offers a functionality to properly handle
fault conditions such as capacitive mode switching, end-of-lamp-life and overcurrent.
UBA2013/L3 is designed for wide-input mains voltage (120 V - 277 V) applications.
2. Features
2.1 Half bridge
„ Suitable for cold and warm ignition
„ Adjustable preheat time
„ Adjustable ignition voltage
„ Integrated bootstrap function
„ Protection for lamp failure and
end-of-life
„ Adjustable preheat current
„ Single ignition attempt
„ Automatic restart after relamping
„ Protection for capacitive mode
2.2 PFC
„ Three pin PFC controller using TON
control
„ Critical mode operation
„ Overvoltage/overcurrent protection
3. Applications
The UBA2013/L3 can provide the drive and control function for a wide range of half bridge
based ballast applications at different mains voltages.
4. Ordering information
Table 1. Ordering information
Type number
Package
Name
Description
UBA2013T
SO16
plastic small outline package; 16 leads; body width 3.9mm
Version
SOT109-1
Free Datasheet http://www.datasheet4u.com/




UBA2013T pdf, 반도체, 판매, 대치품
7. Functional description
7.1 Start-up state
Initial start up can be achieved by means of charging the VDD low voltage supply
capacitor (C2 in the application diagram Figure 6) via an external start-up resistor.
Start-up state is one of the non-oscillating sub-states. MOSFET T2 conducts and T1 is
non-conducting, ensuring bootstrap capacitor C3 to be charged. In this state the circuit will
be reset. The GZCD pin is pulled down and IVO(ref) is not active. If VSTOP < VSTOP(reset) at
the transition of VDD exceeding VDD(start), the IC will enter the oscillating state. If not it will
enter the stop state.
7.2 Half bridge oscillator
Oscillation of the half bridge is controlled by a built-in current-controlled oscillator which
generates a sawtooth waveform at the CF pin. The sawtooth frequency is twice the half
bridge frequency, and is determined by the capacitor at the CF pin and the current-out of
pin CF, as controlled by the voltage at the CI pin. Frequency modulation is achieved by
charging and discharging the CI capacitor. The IC brings MOSFETs T1 and T2 alternately
into conduction with a duty factor of just below 50% each (except for situations where VRS
exceeds VRS(clamp)). Figure 3 represents the timing of the IC. The circuit block
‘non-overlap’ generates a non-overlap time tno that ensures periods of exclusive
conduction of T1 or T2. Time tno depends on the reference current IRREF.
7.3 Oscillating state
Oscillating state can be entered:
when in the startup state VSTOP < VSTOP(reset) at the moment VDD reaches VDD(start),
when in the VddLow state, when VSTOP < VSTOP(ref) at the moment VDD reaches
VDD(start).
The oscillating state has three sub-states: the preheat state, the ignition state and the
burn state. The circuit always starts oscillating in the preheat state.
VCF
internal
clock
VG1_S1
VG2
Fig 3. Oscillator timing
TNO
TNO
014aaa044
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UBA2013T 전자부품, 판매, 대치품
STOP pin is discharged to ground via a switch with on-resistance RSTOP(disch). In case of a
VO-low condition (see Section 7.15), the STOP pin is discharged with a current ISTOP(dis).
Apart from the preheat state or a VO-low condition, the IC will not discharge the STOP pin
at any VDD.
7.9 End-of-life protection
The end-of-life circuit is only active in the burn state and consists of a voltage window
comparator circuit. It compares the voltage at the EOL pin with two internal reference
voltages. When the voltage at the EOL pin is above VEOL(high) or below VEOL(low) the
‘end-of-life’ protection circuit activates the internal current source ISTOP(ch) that charges
the STOP pin. The ‘end-of-life’ protection is not active in case of a VO-low condition (see
Section 7.15).
7.10 Non-oscillating state
Transitions to the non-oscillating state are always made during a G2 high condition in the
half bridge (lower MOSFET T2 conducting). In the non-oscillating state T1 is off, T2 is on,
the PFC control function is stopped by pulling the GZCD pin down to ground continuously,
and reference current IVO(ref) is switched off. Additionally, the CP and CI pins are
discharged to ground. The non-oscillating state has three sub-states: the start-up state,
the stop state and the VddLow state.
7.11 Start-up state
Described at the beginning of this functional description.
7.12 Stop state
The circuit will enter the stop state:
when in any of the oscillating states VSTOP > VSTOP(ref),
when in the VddLow state VSTOP > VSTOP(ref) at the moment VDD exceeds VDD(start),
when in the startup state VSTOP > VSTOP(reset) at the moment VDD exceeds VDD(start).
In the stop state, a clamp circuit is active, limiting the voltage at the VDD pin to VDD(clamp).
The IC goes from the stop state into the startup state if VDD drops below VDD(reset).
7.13 VddLow state
The circuit will enter VddLow state in any of the oscillating states when VDD drops below
VDD(low). The circuit then goes from VddLow state to:
the startup state if VDD drops below VDD(reset),
the stop state if VSTOP > VSTOP(ref) at the moment VDD exceeds VDD(start), or
the preheat state if VSTOP < VSTOP(ref) at the moment VDD exceeds VDD(start).
Free Datasheet http://www.datasheet4u.com/

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