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COP984CL 데이터시트 PDF




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부품번호 COP984CL 기능
기능 8-Bit Microcontroller
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COP984CL 데이터시트, 핀배열, 회로
September 1996
COP688CL COP684CL COP888CL COP884CL
COP988CL COP984CL 8-Bit Microcontroller
General Description
The COP888 family of microcontrollers uses an 8-bit single
chip core architecture fabricated with National Semiconduc-
tor’s M2CMOSTM process technology The COP888CL is a
member of this expandable 8-bit core processor family of
microcontrollers
(Continued)
Key Features
Y Two 16-bit timers each with two 16-bit registers
supporting
Processor Independent PWM mode
External Event counter mode
Input Capture mode
Y 4 kbytes of on-chip ROM
Y 128 bytes of on-chip RAM
Additional Peripheral Features
Y Idle Timer
Y Multi-input Wake Up (MIWU) with optional interrupts (8)
Y WATCHDOGTM and Clock Monitor logic
Y MICROWIRE PLUSTM serial I O
I O Features
Y Memory mapped I O
Y Software selectable I O options (TRI-STATE Output
Push-Pull Output Weak Pull-Up Input High Impedance
Input)
Y High current outputs
Y Schmitt trigger inputs on port G
Y Packages
44 PLCC with 40 I O pins
40 DIP with 36 I O pins
28 DIP with 24 I O pins
28 SO with 24 I O pins
CPU Instruction Set Feature
Y 1 ms instruction cycle time
Y Ten multi-source vectored interrupts servicing
External Interrupt with selectable edge
Idle Timer T0
Timers (Each with 2 interrupts)
MICROWIRE PLUS
Multi-Input Wake Up
Software Trap
Default VIS (default interrupt)
Y Versatile and easy to use instruction set
Y 8-bit Stack Pointer (SP) stack in RAM
Y Two 8-bit Register Indirect Data Memory Pointers (B X)
Fully Static CMOS
Y Low current drain (typically k 1 mA)
Y Single supply operation 2 5V to 6 0V
Y Temperature ranges 0 C to a70 C b40 C to a85 C
b55 C to a125 C
Development Support
Y Emulation and OTP devices
Y Real time emulation and full program debug offered by
MetaLink Development System
Block Diagram
FIGURE 1 Block Diagram
TL DD 9766 – 1
TRI-STATE is a registered trademark of National Semiconductor Corporation
MICROWIRE PLUSTM M2CMOSTM COPSTM microcontrollers WATCHDOGTM and MICROWIRETM are trademarks of National Semiconductor Corporation
iceMASTERTM is a trademark of MetaLink Corporation
C1996 National Semiconductor Corporation TL DD 9766
RRD-B30M96 Printed in U S A
http www national com
Free Datasheet http://www.datasheet4u.com/




COP984CL pdf, 반도체, 판매, 대치품
Absolute Maximum Ratings
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage (VCC)
Voltage at Any Pin
Total Current into VCC Pin (Source)
7V
b0 3V to VCC a 0 3V
100 mA
Total Current out of GND Pin (Sink)
110 mA
Storage Temperature Range
b65 C to a140 C
Note Absolute maximum ratings indicate limits beyond
which damage to the device may occur DC and AC electri-
cal specifications are not ensured when operating the de-
vice at absolute maximum ratings
DC Electrical Characteristics COP98XCL 0 C s TA s a70 C unless otherwise specified
Parameter
Conditions
Min Typ
Max Units
Operating Voltage
COP98XCL
COP98XCLH
25 40 V
40 60 V
Power Supply Ripple (Note 1)
Peak-to-Peak
0 1 VCC
V
Supply Current (Note 2)
CKI e 10 MHz
CKI e 4 MHz
VCC e 6V tc e 1 ms
VCC e 4V tc e 2 5 ms
12 5 mA
2 5 mA
HALT Current (Note 3)
VCC e 6V CKI e 0 MHz
VCC e 4V CKI e 0 MHz
k0 7
k0 4
8
5
mA
mA
IDLE Current
CKI e 10 MHz
VCC e 6V tc e 1 ms
3 5 mA
Input Levels
RESET
Logic High
Logic Low
CKI (External and Crystal Osc Modes)
Logic High
Logic Low
All Other Inputs
Logic High
Logic Low
0 8 VCC
0 7 VCC
0 7 VCC
0 2 VCC
0 2 VCC
0 2 VCC
V
V
V
V
V
V
Hi-Z Input Leakage
VCC e 6V
b1 a1 mA
Input Pullup Current
VCC e 6V VIN e 0V
b40
b250
mA
G and L Port Input Hysteresis
0 35 VCC
V
Output Current Levels
D Outputs
Source
Sink
All Others
Source (Weak Pull-Up Mode)
Source (Push-Pull Mode)
Sink (Push-Pull Mode)
VCC e 4V VOH e 3 3V
VCC e 2 5V VOH e 1 8V
VCC e 4V VOL e 1V
VCC e 2 5V VOL e 0 4V
VCC e 4V VOH e 2 7V
VCC e 2 5V VOH e 1 8V
VCC e 4V VOH e 3 3V
VCC e 2 5V VOH e 1 8V
VCC e 4V VOL e 0 4V
VCC e 2 5V VOL e 0 4V
b0 4
b0 2
10
20
b10
b2 5
b0 4
b0 2
16
07
b100
b33
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Note 1 Rate of voltage change must be less then 0 5 V ms
Note 2 Supply current is measured after running 2000 cycles with a square wave CKI input CKO open inputs at rails and outputs open
Note 3 The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations Test conditions All inputs tied to VCC L and G0–G5 configured as
outputs and set high The D port set to zero The clock monitor is disabled
http www national com
4
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COP984CL 전자부품, 판매, 대치품
DC Electrical Characteristics b40 C s TA s a85 C unless otherwise specified (Continued)
Parameter
Conditions
Min Typ
Max
Allowable Sink Source
Current per Pin
D Outputs (Sink)
All others
15
3
Maximum Input Current
without Latchup (Note 4)
TA e 25 C
g100
RAM Retention Voltage Vr
500 ns Rise
and Fall Time (Min)
2
Input Capacitance
7
Load Capacitance on D2
1000
Units
mA
mA
mA
V
pF
pF
AC Electrical Characteristics b40 C s TA s a85 C unless otherwise specified
Parameter
Conditions
Min Typ Max Units
Instruction Cycle Time (tc)
Crystal or Resonator
R C Oscillator
Inputs
tSETUP
tHOLD
Output Propagation Delay (Note 5)
tPD1 tPD0
SO SK
All Others
MICROWIRE Setup Time (tUWS)
MICROWIRE Hold Time (tUWH)
MICROWIRE Output Propagation Delay (tUPD)
Input Pulse Width
Interrupt Input High Time
Interrupt Input Low Time
Timer Input High Time
Timer Input Low Time
Reset Pulse Width
4V s VCC s 6V
2 5V s VCC k 4V
4V s VCC s 6V
2 5V s VCC k 4V
4V s VCC s 6V
2 5V s VCC k 4V
4V s VCC s 6V
2 5V s VCC k 4V
RL e 2 2k CL e 100 pF
4V s VCC s 6V
2 5V s VCC k 4V
4V s VCC s 6V
2 5V s VCC k 4V
1
25
3
75
200
500
60
150
20
56
1
1
1
1
1
DC ms
DC ms
DC ms
DC ms
ns
ns
ns
ns
07
1 75
1
25
220
ms
ms
ms
ms
ns
ns
ns
tc
tc
tc
tc
ms
Note 4 Pins G6 and RESET are designed with a high voltage input network for factory testing These pins allow input voltages greater than VCC and the pins will
have sink current to VCC when biased at voltages greater than VCC (the pins do not have source current when biased at a voltage below VCC) The effective
resistance to VCC is 750X (typical) These two pins will not latch up The voltage at the pins must be limited to less than 14V
Note 5 The output propagation delay is referenced to the end of the instruction cycle where the output change occurs
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