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PDF PJ494 Data sheet ( Hoja de datos )
| Número de pieza | PJ494 | |
| Descripción | Switchmode Pulse Width Modulation Control Circuit | |
| Fabricantes | Promax-Johnton | |
| Logotipo |  |
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PJ494
Switchmode Pulse Width Modulation Control Circuit
T he PJ494 incorporates on a single monolithic chip all
the functions required in the construction of a pulse-
width-modulation control circuit. Designed primarily for
power supply control, these devices offer the systems
engineer the flexibility to tailor the power supply control
circuitry to his application.
The PJ494 contains an error amplifier, an on-chip adjustable
oscillator, a deed-time control comparator, pulse-steering
control flip-flop, a 5-volt, 5% precision regulator, and output-
control circuits. The error amplifier exhibits a common-mode
voltage from –0.3 volts to Vcc –2 volts. The dead-time
control comparator has a fixed offset that provides
approximately 5% dead time when externally altered. The on-
chip oscillatory be bypassed by terminating RT (pin 6) to the
reference output and providing a sawtooth input to CT (PIN
5), or it may be used to drive the common circuits in
synchronous multiple-rail power supplies. The uncommited
output transistor provide either common-emitter or emitter-
follower output capability. Each device provides for push-pull
or single-ended output operation, which may be selected
through the output-control function. The architecture of these
devices prohibits the possibility of either output being pulsed
twice during push-pull operation.
FEATURES
• Complete PWM Power Control Circuitry
• Uncommitted Outputs for 200mA Sink or Source Current
• Output Control Selects Single-Ended or Push –Pull Operation
• Internal Circuitry Prohibits Double Pulse at Either Output
• Variable Dead-Time Provides Control over Total Range
• Internal Regulator Provides a Stable 5-V Reference Supply, 5%
•ORDCiErcRuiItNAGrcIhNiteFcOturReMAAlloTwIsOENasy Synchronization
Device
PJ494CD
PJ494CS
OperatingTemperature
(Ambient)
-20℃ to +85℃
Package
DIP-16
SOP-16
DIP-16
SOP-16
Pin 1.Noninv Input
2.Inv Input
3.Feedback
5.CT
8.C1
11.C2
13.Output Control
15. Inv Input
16. Noninv Input
﹜Error Amp1
4.Dead-Time Control
6.RT
9.E1
7.Gnd
10.E2
12.Vcc
14.Ref Out
﹜Error Amp2
ABSOLUTE MAXIMUM RATINGS OVER OPERATING FREE-AIR TEMPERATURE RANGE
(unless otherwise noted)
Rating
Supply voltage
Amplifier input voltage
Collector output voltage
Collector output current
Operating free-air temperature range
Storage temperature range
Operating Junction Temperature
Lead temperature 1,6mm from case for 10 seconds
Power Dissipation @TA≦45℃
Symbol
Vcc
Vi
Vo
Tstg
TJ
PD
Value
41
Vcc+0.3
41
250
-20 to 85
-25 to 125
125
260
1000
Unit
V
mA
℃
mW
1-11
2002/11.rev.A
Free Datasheet http://www.datasheet4u.com/
1 page  
PJ494
Switchmode Pulse Width Modulation Control Circuit
APPLICATIONS INFORMATION
Description
The PJ494 is a fixed-frequency pulse width modulation control circuit, incorporating the primary building blocks required for
the control of a switching power supply . (See Figure 1.) An internal-linear sawtooth oscillator is frequescy-programmable by two
external components, RT and CT. The approximate oscillator frequency is determined by:
……….. For more information refer to Figure 3.
Output pulse width modulation is accomplished by comparison of the positive sawtooth waveform across capacitor CT to
either of two control signals. The NOR gates, which drive output transistors Q1 and Q2, are enabled only when the flip-flop
clock-input line is in its low state. This happens only during that portion of time when the sawtoothvoltage is greater than the
control signals. Therefore, an increase in contro-signal amplitude causes a corresponding linear decrease of output pulse width.
(Refer to the Timing Diagram shown in Figure 2.)
The control signals are external inputs that can be fed into the deadtime control, the error amplifier inputs, or the feedback
input. The deadtime control comparator has an effective 120mV input offset which limits the minimum output deadtime to
approximately tge first 4% of the sawtooth-cycle time. This would result in a maximum duty cycle on a given output of 96% with
the output control grounded, and 48% with it connected to the reference line. Additional deadtime may be imposed on the output
by setting the deadtime-control input to a fixed voltage, ranging between 0V to 3.3V .
The pulse width modulator comparator provides a means for the error amplifiers to adjust the output pulse width from the
maximum percent on-time, established by the deadtime control input, down to zero as the voltage at the feedback pin varies from
0.5V to 3.5V. Both error amplifiers have a common mode input range from -0.3C to (Vcc – 2V), and may be ised to sense power-
supply output voltage and current. The error –amplifier outputs are active high and are ORed together at the noninverting input of
the pulse-width modulator comparator. With this configuration, the amplifier that demands minimum output on time, dominates
control of the loop.
When capacitor CT is discharged, a positive pulse is generated on the output of the deadtime comparator, which clocks the
pulse-steering flip=flop and inhibits the output transistors, Q1 and Q2. With the output-control connected to the reference line, the
pulse-steering flip-flop directs the modulated pulses to each of the rwo output transistors alternately for push-pull operation. The
output frequency is equal to half that of the oscillator. Output drive can also be taken from Q1 and Q2, when single-ended
operation with a maximum on-time of less than 50% is required. This is desirable when the output transformer has a ringback
winding with a catch diode ised for snubbing. When higher output-drive currents are required for single-ended operation, Q1 and
Q2 may be connected in parallel, and the output mode pin must be tied to ground to disable the flip-flop. The output frequency
will now be equal to that of the oscillator.
The PJ494 has an internal 5.0V reference capable of sourcing up to 10mA of laod current for external bias circuits. The
reference has an internal accuracy of ±5.0% with a typical thermal drift of less than 50mV over an operating temperature range of 0 to
70℃.
Figure 3. Oscillator Frequency versus Timing Resistance
5-11
2002/11.rev.A
Free Datasheet http://www.datasheet4u.com/
5 Page 
PJ494
Switchmode Pulse Width Modulation Control Circuit
DIM
A
B
C
D
G
J
K
L
M
MILLIMETERS
MIN MAX
17.80 18.05
6.25 6.45
2.35 2.65
0.35 0.49
1.27BSC
0.25 0.32
0.10 0.25
0° 7°
- 10°
INCHES
MIN
MAX
0.701
0.710
0.292
0.299
0.093
0.104
0.014
0.019
0.05BSC
0.010
0.012
0.004
0.009
0° 7°
0.395
0.415
DIM
A
B
C
D
F
G
K
M
P
R
MILLIMETERS
MIN MAX
9.80 10.00
7.40 7.60
2.35 2.65
0.35 0.49
0.50 0.90
1.27BSC
0.10 0.25
0° 7°
10.05 10.55
0.25 0.75
INCHES
MIN
MAX
0.386
0.393
0.292
0.299
0.093
0.104
0.014
0.019
0.020
0.035
0.05BSC
0.004
0.009
0° 7°
0.395
0.415
0.010
0.029
11-11
2002/11.rev.A
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet PJ494.PDF ] | |
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