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HIP7038A8 데이터시트 PDF




Intersil Corporation에서 제조한 전자 부품 HIP7038A8은 전자 산업 및 응용 분야에서
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부품번호 HIP7038A8 기능
기능 J1850 8-Bit 68HC05 Microcontroller 8K EEPROM Version
제조업체 Intersil Corporation
로고 Intersil Corporation 로고


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HIP7038A8 데이터시트, 핀배열, 회로
HIP7038A8
PRELIMINARY
April 1994
J1850 8-Bit 68HC05 Microcontroller
8K EEPROM Version
Features
Description
• Direct Replacement for HIP7030A2/A8 Microcontrollers
- All Hardware and Software Features
- Equivalent Timing and Performance
• Memory
- 176 Bytes of RAM
- 7744 Bytes of Programmable EEPROM
- 242 Bytes of Bootstrap Program
• Single 5V Supply
• 10MHz Operating Frequency (5.0MHz Internal Bus
Frequency) at 5V.
• 28 Lead Small Outline Ceramic Package
- Same Terminal Assignment as HIP7030A2
and HIP7030A8
The HIP7038A8 HCMOS Microcomputer is an EEPROM
version of the HIP7030A family of low-cost single-chip J1850
microcontrollers. These microcontrollers provide the system
designer with a complete set of building blocks for imple-
menting a “Class B” VPW multiplexed communications
network interface, which fully complies with SAE Recom-
mended Practice J1850. The HIP7038A8 contains all hard-
ware and software features of the HIP7030A2/A8
microcontrollers with equivalent timing, performance charac-
teristics, and an identical footprint.
The device can be programmed using the HIP7038A8
EEPROM Programmer available from Intersil. In-circuit
Emulation Tools are also provided for system development.
Ordering Information
TEMPERATURE
PART NUMBER
RANGE
PACKAGE
HIP7038A8F
-40oC to +85oC 28 Lead Ceramic SOIC
Pinout
HIP7038A8 (SOIC FLATPACK)
TOP VIEW
TCAP 1
TCMP 2
VPWIN 3
VPWOUT 4
RESET 5
IRQ 6
VDD 7
PA7 8
PA6 9
PA5 10
PA4 11
PA3 12
PA2 13
PA1 14
28 SS
27 MISO
26 MOSI
25 SCK
24 OSCIN
23 OSCOUT
22 VSS
21 PD0
20 PD1
19 PD2, V2
18 PD3, V3
17 PD4, VREF
16 OSCB
15 PA0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
407-727-9207 | Copyright © Intersil Corporation 1999
9-99
File Number 3647.1




HIP7038A8 pdf, 반도체, 판매, 대치품
HIP7038A8
Functional Description
Memory Organization
The HIP7038A8 MCU is functionally identical to the
HIP7030A2 and HIP7030A8 microcontrollers. The device
differs only in that the on-board masked ROM has been
replaced with EEPROM, which allows the device to be
rapidly programmed by the user. For detailed information
about the functions included on the HIP7038A8 refer to File
Number 3646, the technical specification of the HIP7030A2
Microcontroller. Only differences are presented here.
The availability of the HIP7038A8 dramatically reduces the
time-to-market of new products by providing the develop-
ment engineer rapid feedback during the design phase of a
HIP7030A2/8 project.
The EEPROM is reusable and can be reprogrammed up to
104 times.
The HIP7038A8 MCU addresses 8192 bytes of memory and
I/O registers with its program counter. Of these locations,
8184 have been implemented as shown in Figure 1. The first
256 bytes of memory (page zero) include: 24 bytes of I/O
features such as data ports, the port DDRs, Timer, serial
peripheral interface (SPI), and J1850 VPW Registers; 48
bytes of user ROM, and 176 bytes of RAM. The next 7680
bytes complete the user ROM. The Built-In-Test ROM (242
bytes) is contained in memory locations $1F00 through
$1FF1. The 14 highest address bytes contain the user
defined reset and the interrupt vectors. Eight bytes of the
lowest 32 memory locations are unused and the 176 bytes of
user RAM include up to 64 bytes for the stack. Since most
programs use only a small part of the allocated stack loca-
tions for interrupts and/or subroutine stacking purposes, the
unused bytes are usable for program data storage.
$0000
I/O
32 BYTES
0000
$001F
$0020
$004F
$0050
USER
ROM
48 BYTES
0031
0032
0079
0080
RAM
176 BYTES
$00BF
$00C0
$00FF
$0100
STACK
64 BYTES
0191
0192
0255
0256
USER
ROM
7680 BYTES
PORTS
1 BYTE
UNUSED
2 BYTES
PORTS
2 BYTES
UNUSED
2 BYTES
0000
PORTS
2 BYTES
UNUSED
1 BYTE
SERIAL PERIPHERAL
INTERFACE
3 BYTES
UNUSED
2 BYTES
SENDEC
INTERFACE
3 BYTES
TIMER
10 BYTES
UNUSED
1 BYTE
TEST
1 BYTE
WATCHDOG
2 BYTES
0031
$1EFF
$1F00
7935
7936
BUILT-IN-TEST
$1FE1
$1FE2
BUILT-IN-TEST
VECTORS
$1FF1
$1FF2
$1FFF
USER
VECTORS
14 BYTES
8177
8178
8191
256 BYTES
PORT A DATA REGISTER
UNUSED
UNUSED
PORT D DATA REGISTER
PORT A DATA DIRECTION REGISTER
UNUSED
UNUSED
PORT D DATA DIRECTION REGISTER
PORT D SPECIAL FUNCTION REGISTER
UNUSED
SERIAL PERIPHERAL CONTROL REGISTER
SERIAL PERIPHERAL STATUS REGISTER
SERIAL PERIPHERAL DATA I/O REGISTER
UNUSED
UNUSED
SENDEC CONTROL REGISTER
SENDEC STATUS REGISTER
SENDEC DATA REGISTER
TIMER CONTROL REGISTER
TIMER STATUS REGISTER
INPUT CAPTURE HIGH REGISTER
INPUT CAPTURE LOW REGISTER
OUTPUT COMPARE HIGH REGISTER
OUTPUT COMPARE LOW REGISTER
COUNTER HIGH REGISTER
COUNTER LOW REGISTER
ALTERNATE COUNTER HIGH REGISTER
ALTERNATE COUNTER LOW REGISTER
UNUSED
WATCHDOG RESET REGISTER
WATCHDOG STATUS REGISTER
TEST REGISTER (SEE NOTE)
$00
$01
$02
$03
$04
$05
$06
$07
$08
$09
$0A
$0B
$0C
$0D
$0E
$0F
$10
$11
$12
$13
$14
$15
$16
$17
$18
$19
$1A
$1B
$1C
$1D
$1E
$1F
FIGURE 1. MEMORY MAP OF THE HIP7038A8
NOTE: Accessable in test mode only.
9-102

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