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HIP9021 데이터시트 PDF




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부품번호 HIP9021 기능
기능 Portable Battery Drive/Torque Controller for N-Channel MOSFETs in Motor Control Systems
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HIP9021 데이터시트, 핀배열, 회로
HIP9021
PRELIMINARY
August 1996
Portable Battery Drive/Torque Controller for
N-Channel MOSFETs in Motor Control Systems
Features
Description
• MOSFET Driver and DC Motor Controller
• Torque Control and Overload Protection
• Battery Power Supply . . . . . . . . . . . . . . . . +5V to +15V
• BiMOS IC with Low Operating Current
- Maximum Supply Current . . . . . . . . . . . . . . . . .1.5mA
- Maximum Input Leakage Currents . . . . . . . . . . 1.5µA
• 500µA Maximum Supply Current
• 1µA Maximum Input Leakage Currents
• Typical Oscillator Frequency . . . . . . . . . . . . . . . . . 5kHz
• Power-On-Reset Control
• 10mA Drive Capability for Gate Output
• Operating Temperature . . . . . . . -40oC to +85oC Range
Applications
• Portable Battery Operated Electric Drills
• Controller for Small DC Electric Motors
• Torque/Drive Controller for Inductive Loads
• Intelligent MOSFET Drive
Ordering Information
PART NUMBER
HIP9021IB
TEMP.
RANGE (oC)
PACKAGE
-40 to +85 8 Ld SOIC
PKG.
NO.
M8.15
The HIP9021IB is a dedicated Power MOSFET driver which
drives a DC motor. As a system, motor speed is controlled
while controlling torque. The primary application is drive con-
trol for portable drills while providing overload protection.
The main function of the HIP9021IB is to produce a pulse
width modulated square wave signal which drives the gate of
an N-Channel Power MOSFET. The duty-cycle is deter-
mined by the setting of an external potentiometer at the
TRIGGER (speed control) input. As the TRIGGER voltage
level is decreased the duty-cycle of the square wave and the
speed of the motor is increased.
The torque of the motor is limited by the voltage level sensed
at the drain of the external Power MOSFET. When the cur-
rent reaches an adjustable limit set at the TORQUE input,
the drive of the Power MOSFET is disabled.
The system control components include 2 adjustable poten-
tiometer controls and 2 capacitors for the operating fre-
quency and torque delay control. A fixed or battery supply
voltage in the range of 5V to 15V may be used.
The HIP9021IB is provided in a small outline plastic package
for a compact surface mount to a ceramic substrate. The
surface mount assembly can be fit directly into the trigger of
a portable electric drill.
Pinout
HIP9021IB
(SOIC)
TOP VIEW
DRAIN 1
TRIGGER 2
GND 3
OSC 4
8 VDD
7 GATE
6 DELAY
5 TORQUE
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
File Number 4055




HIP9021 pdf, 반도체, 판매, 대치품
HIP9021
2V
5V
7.5V
15K
1V
VDRAIN
1
2V
5V DRAIN
1nF
2V VTORQUE 5
5V
TORQUE
1nF
VTRIGGER
2
TRIGGER
22nF
VDD
VDD
810µF
+
0.01µF
+ CONTROL
- & LOGIC
GC
-
+
OSC
HIP9021
GND 3
6 VDELAY
DELAY
7 VGATE
1V
2V
10K
RD
GATE
10nF
4 VOSC
OSC
3.75V
2.5V
5V
1nF
VGATE
VDD
VDELAY
GATE PULSE WIDTH
FRAMED PULSE WIDTH
FRAMED PULSE DELAY
GND
1V
GND
NOTE: The timing diagrams relate to the delay output framed pulse and show the time duration of the delay pulse “framed” inside of the gate
pulse. The framed pulse duty cycle and delay, in percent, are measured in reference to the gate pulse which is set at 50% duty cycle. The
Delay output framed pulse delay is one-half of the difference of the gate pulse width minus delay output framed pulse width.
FIGURE 1. ELECTRICAL CHARACTERISTICS TEST CIRCUIT FOR SIGNAL FUNCTIONS OF THE HIP9021
SYMBOL
IDD
+IOSC
-IOSC
VOSC(TH)
VOSC(TG)
ITRIGGER
ITORQUE
IDELAY1
IDELAY2
VDELAY(TH)
RDRAIN
IDRAIN
VGATE
IGATE
VGATE(S/R)
FP/DC
FP/DLY
fOSC
TABLE 1. SWITCH POSITIONS OF FIGURE 1 FOR ELECTRICAL CHARACTERISTIC TESTING
DRAIN
15Kto 2V
15Kto 2V
15Kto 2V
1V
1V
15Kto 2V
15Kto 2V
15Kto 2V
15Kto 2V
1V
TRIGGER
GND
GND
GND
Open
Open
5V
Open
7.5V
7.5V
Ramp Up
5V GND
OSC
3.75V
2.5V
5V
1nF
1nF
5V
5V
1nF
1nF
1nF
1nF
TORQUE
2V
2V
2V
2V
2V
2V
5V
Open
Open
2V
2V
DELAY
Open
Open
Open
Open
Open
Open
Open
1V
2V
GND
GND
GATE
Open
Open
Open
Open
Open
Open
Open
Open
Open
Read VGATE
Open
1V 7.5V 5V 2V Open Open
5V
GND
1nF
2V Open Open
2V
GND
1nF
2V GND Set to
VOUT -0.5V
Refer to Figure 2 Application Circuit, 50% GATE Output Duty Cycle
1V
VOSC(TH) -
1nF
-1V
2V
GND
25KLoad
MEASURE
IDD Current Into VDD Pin
Source Current From OSC Pin
Sink Current Into OSC Pin
Positive Peak OSC Voltage
Negative Peak OSC Voltage
TRIGGER Leakage Current
TORQUE Leakage Current
Current to DELAY Pin
Current to DELAY Pin
Measure VTRIGGER When
VGATE Less Than 0.5V
DRAIN Current; Calculate
RDRAIN = 5V/IDRAIN
DRAIN Current
Measure VGATE = VOUT
Measure IGATE Source Current
with VGATE = VOUT -0.5V
GATE Output Slew Rate
Reference Figure 1 Waveforms
Reference Figure 1 Waveforms
GATE Output Timing
4

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HIP9021 전자부품, 판매, 대치품
HIP9021
Small Outline Plastic Packages (SOIC)
N
INDEX
AREA
E
-B-
H
0.25(0.010) M B M
123
-A-
D
SEATING PLANE
A
L
h x 45o
-C-
e A1
B
0.25(0.010) M C A M B S
α
0.10(0.004)
C
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. In-
terlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact.
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A
0.0532 0.0688 1.35
1.75
-
A1
0.0040 0.0098 0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075 0.0098 0.19
0.25
-
D
0.1890 0.1968 4.80
5.00
3
E
0.1497 0.1574 3.80
4.00
4
e 0.050 BSC
1.27 BSC
-
H
0.2284 0.2440 5.80
6.20
-
h
0.0099 0.0196 0.25
0.50
5
L
0.016
0.050
0.40
1.27
6
N8
87
α 0o 8o 0o 8o -
Rev. 0 12/93
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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