Datasheet.kr   

AD9258 데이터시트 PDF




Analog Devices에서 제조한 전자 부품 AD9258은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 AD9258 자료 제공

부품번호 AD9258 기능
기능 1.8V Dual Analog-to-Digital Converter
제조업체 Analog Devices
로고 Analog Devices 로고


AD9258 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.




전체 30 페이지수

미리보기를 사용할 수 없습니다

AD9258 데이터시트, 핀배열, 회로
14-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Dual
Analog-to-Digital Converter (ADC)
AD9258
FEATURES
SNR = 77.6 dBFS @ 70 MHz and 125 MSPS
SFDR = 88 dBc @ 70 MHz and 125 MSPS
Low power: 750 mW @ 125 MSPS
1.8 V analog supply operation
1.8 V CMOS or LVDS output supply
Integer 1-to-8 input clock divider
IF sampling frequencies to 300 MHz
−152.8 dBm/Hz small signal input noise with 200 Ω input
impedance @ 70 MHz and 125 MSPS
Optional on-chip dither
Programmable internal ADC voltage reference
Integrated ADC sample-and-hold inputs
Flexible analog input range: 1 V p-p to 2 V p-p
Differential analog inputs with 650 MHz bandwidth
ADC clock duty cycle stabilizer
95 dB channel isolation/crosstalk
Serial port control
User-configurable, built-in self-test (BIST) capability
Energy-saving power-down modes
APPLICATIONS
Communications
Diversity radio systems
Multimode digital receivers (3G)
GSM, EDGE, W-CDMA, LTE,
CDMA2000, WiMAX, TD-SCDMA
I/Q demodulation systems
Smart antenna systems
General-purpose software radios
Broadband data applications
Ultrasound equipment
FUNCTIONAL BLOCK DIAGRAM
AVDD
SDIO/ SCLK/
DCS DFS CSB
DRVDD
AD9258
SPI
VIN+A
VIN–A
ADC
PROGRAMMING DATA
CMOS/LVDS 14
OUTPUT BUFFER
ORA
D13A (MSB)
TO
D0A (LSB)
VREF
SENSE
VCM
RBIAS
VIN–B
VIN+B
REF
SELECT
ADC
MULTICHIP
SYNC
DIVIDE 1
TO 8
DUTY CYCLE
DCO
STABILIZER GENERATION
CMOS/LVDS 14
OUTPUT BUFFER
CLK+
CLK–
DCOA
DCOB
ORB
D13B (MSB)
TO
D0B (LSB)
AGND SYNC
PDWN
OEB
NOTES
1. PIN NAMES ARE FOR THE CMOS PIN CONFIGURATION ONLY;
SEE FIGURE 7 FOR LVDS PIN NAMES.
Figure 1.
PRODUCT HIGHLIGHTS
1. On-chip dither option for improved SFDR performance
with low power analog input.
2. Proprietary differential input that maintains excellent SNR
performance for input frequencies up to 300 MHz.
3. Operation from a single 1.8 V supply and a separate digital
output driver supply accommodating 1.8 V CMOS or
LVDS outputs.
4. Standard serial port interface (SPI) that supports various
product features and functions, such as data formatting
(offset binary, twos complement, or gray coding), enabling
the clock DCS, power-down, test modes, and voltage
reference mode.
5. Pin compatibility with the AD9268, allowing a simple
migration from 14 bits to 16 bits. The AD9258 is also pin
compatible with the AD9251, AD9231, and AD9204 family
of products for lower sample rate, low power applications.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.
Free Datasheet http://www.datasheet4u.com/




AD9258 pdf, 반도체, 판매, 대치품
AD9258
SPECIFICATIONS
ADC DC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.0 V internal reference, DCS enabled, unless
otherwise noted.
Table 1.
Parameter
RESOLUTION
ACCURACY
No Missing Codes
Offset Error
Gain Error
Differential
Nonlinearity (DNL)1
Integral Nonlinearity
(INL)1
MATCHING
CHARACTERISTIC
Offset Error
Gain Error
TEMPERATURE DRIFT
Offset Error
Gain Error
INTERNAL VOLTAGE
REFERENCE
Output Voltage Error
(1 V Mode)
Load Regulation @
1.0 mA
INPUT REFERRED NOISE
VREF = 1.0 V
ANALOG INPUT
Input Span, VREF =
1.0 V
Input Capacitance2
Input Common-
Mode Voltage
REFERENCE INPUT
RESISTANCE
POWER SUPPLIES
Supply Voltage
AVDD
DRVDD
Supply Current
IAVDD1
IDRVDD1 (1.8 V
CMOS)
IDRVDD1 (1.8 V
LVDS)
Temperature
Full
Full
Full
Full
Full
25°C
Full
25°C
Full
Full
Full
Full
Full
Full
25°C
Full
Full
Full
Full
Full
Full
Full
Full
Full
AD9258BCPZ-80
Min Typ
Max
14
Guaranteed
±0.1
±0.4
±0.5
±2.5
±0.5
±0.25
±1.1
±0.55
±0.1 ±0.4
±0.3 ±1.3
±2
±15
±5 ±12
5
0.62
2
8
0.9
6
1.7 1.8
1.7 1.8
234
33
81
1.9
1.9
240
AD9258BCPZ-105
Min Typ
Max
14
Guaranteed
±0.1
±0.4
±0.5
±2.5
±0.5
±0.25
±1.3
±0.7
±0.1 ±0.4
±0.3 ±1.3
±2
±15
±5 ±12
5
0.63
2
8
0.9
6
1.7 1.8
1.7 1.8
293
43
81
1.9
1.9
300
AD9258BCPZ-125
Min Typ
Max
14
Guaranteed
±0.4
±0.4
±0.65
±2.5
±0.5
±0.25
±1.4
±0.8
±0.2 ±0.45
±0.3 ±1.3
±2
±15
±5 ±12
5
0.7
2
8
0.9
6
1.7 1.8
1.7 1.8
390
53
90
1.9
1.9
400
Unit
Bits
% FSR
% FSR
LSB
LSB
LSB
LSB
% FSR
% FSR
ppm/°C
ppm/°C
mV
mV
LSB
rms
V p-p
pF
V
V
V
mA
mA
mA
Rev. A | Page 4 of 44
Free Datasheet http://www.datasheet4u.com/

4페이지










AD9258 전자부품, 판매, 대치품
AD9258
Parameter1
WORST OTHER (HARMONIC OR SPUR)
Without Dither
fIN = 2.4 MHz
fIN = 70 MHz
fIN = 140 MHz
fIN = 200 MHz
With On-Chip Dither
fIN = 2.4 MHz
fIN = 70 MHz
fIN = 140 MHz
fIN = 200 MHz
TWO-TONE SFDR WITHOUT DITHER
fIN = 29 MHz (−7 dBFS ), 32 MHz (−7 dBFS )
fIN = 169 MHz (−7 dBFS ),172 MHz (−7 dBFS )
CROSSTALK2
ANALOG INPUT BANDWIDTH
AD9258BCPZ-80
Temp Min Typ Max
25°C −100
25°C −100 −96
Full −96
25°C −97
25°C −95
25°C −109
25°C −105 −96
Full −96
25°C −106
25°C −102
25°C 93
25°C 81
Full −95
25°C 650
AD9258BCPZ-105
Min Typ Max
−100
−99
−97
−95
−94
−94
−107
−106
−104
−104
−95
−95
92
80
−95
650
1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions.
2 Crosstalk is measured at 100 MHz with −1.0 dBFS on one channel and no input on the alternate channel.
AD9258BCPZ-125
Min Typ Max
−99
−98 −94
−94
−97
−95
−107
−105
−103
−97
−95
−95
90
82
−95
650
Unit
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dB
MHz
DIGITAL SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.0 V internal reference, and DCS enabled, unless
otherwise noted.
Table 3.
Parameter
DIFFERENTIAL CLOCK INPUTS (CLK+, CLK−)
Logic Compliance
Internal Common-Mode Bias
Differential Input Voltage
Input Voltage Range
Input Common-Mode Range
High Level Input Current
Low Level Input Current
Input Capacitance
Input Resistance
SYNC INPUT
Logic Compliance
Internal Bias
Input Voltage Range
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Capacitance
Input Resistance
Temperature
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Min Typ Max
0.3
AGND
0.9
−100
−100
8
CMOS/LVDS/LVPECL
0.9
3.6
AVDD
1.4
+100
+100
4
10 12
AGND
1.2
AGND
−100
−100
12
CMOS
0.9
1
16
AVDD
AVDD
0.6
+100
+100
20
Unit
V
V p-p
V
V
μA
μA
pF
V
V
V
V
μA
μA
pF
Rev. A | Page 7 of 44
Free Datasheet http://www.datasheet4u.com/

7페이지


구       성 총 30 페이지수
다운로드[ AD9258.PDF 데이터시트 ]

당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는

포괄적인 데이터시트를 제공합니다.


구매 문의
일반 IC 문의 : 샘플 및 소량 구매
-----------------------------------------------------------------------

IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한
광범위한 전력 반도체를 판매합니다.

전력 반도체 전문업체

상호 : 아이지 인터내셔날

사이트 방문 :     [ 홈페이지 ]     [ 블로그 1 ]     [ 블로그 2 ]



관련 데이터시트

부품번호상세설명 및 기능제조사
AD9250

Dual Analog-to-Digital Converter

Analog Devices
Analog Devices
AD9251

1.8 V Dual Analog-to-Digital Converter

Analog Devices
Analog Devices

DataSheet.kr       |      2020   |     연락처      |     링크모음      |      검색     |      사이트맵