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PDF ADM1186 Data sheet ( Hoja de datos )
| Número de pieza | ADM1186 | |
| Descripción | Quad Voltage Up and Down Sequencer and Monitor | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
Quad Voltage Up and Down Sequencer
and Monitor with Programmable Timing
ADM1186
FEATURES
Powered from 2.7 V to 5.5 V on the VCC pin
Monitors four supplies via 0.8% accurate comparators
Digital core supports up and down supply sequencing
Multiple devices can be cascaded (ADM1186-1)
Four inputs can be programmed to monitor different voltage
levels with resistor dividers
Capacitor programmable supply sequence time delays
and a timeout delay to 5% accuracy at 25°C
Four open-drain enable outputs
Open-drain power-good output
Open-drain sequence complete pin and bidirectional
open-drain fault pin (ADM1186-1 only)
APPLICATIONS
Monitor and alarm functions
Up and down power supply sequencing
Telecommunication and data communication equipment
PCs, servers, and notebook PCs
GENERAL DESCRIPTION
The ADM1186-1 and ADM1186-2 are integrated, four-channel
voltage monitoring and sequencing devices. A 2.7 V to 5.5 V
power supply is required on the VCC pin for power.
Four precision comparators, VIN1 to VIN4, monitor four
voltage rails. All four comparators share a 0.6 V reference and
have a worst-case accuracy of 0.8%. Resistor networks that are
external to the VIN1, VIN2, VIN3, and VIN4 pins set the
undervoltage (UV) trip points for the monitored supply rails.
The ADM1186-1 and ADM1186-2 have four open-drain enable
outputs, OUT1 to OUT4, that are used to enable power supplies.
An open-drain power-good output, PWRGD, indicates whether
the four VINx inputs are above their UV thresholds.
A state machine monitors the state of the UP and DOWN pins
on the ADM1186-1 or the UP/DOWN pin on the ADM1186-2
to control the supply sequencing direction (see Figure 2). In the
WAIT START state, a rising edge transition on the UP or
UP/DOWN pin triggers a power-up sequence. A falling edge
transition on the DOWN or UP/DOWN pin in the POWER-UP
DONE state triggers a power-down sequence.
3.3V AUX
SEQUENCE CONTROL
3.3V AUX
1µF
100nF
APPLICATION DIAGRAM
5V
5V
IN
ADP1706
EN OUT
5V
5V
IN
ADP2107
EN OUT
3.3V AUX
3.3V AUX
IN
ADP1821
EN OUT
5V
5V
IN
ADP1706
EN OUT
VCC OUT1 OUT2 OUT3 OUT4
FAULT
UP
DOWN
ADM1186-1
DLY_EN_OUT1
VIN1
VIN2
VIN3
VIN4
DLY_EN_OUT2
DLY_EN_OUT3
DLY_EN_OUT4
PWRGD
BLANK_DLY
GND
SEQ_DONE
2.5V AUX
2.5V
1.8V
1.2V
3.3V
3.3V AUX
Figure 1.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2008–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
ADM1186
Data Sheet
SPECIFICATIONS
VVCC = 2.7 V to 5.5 V, TA = −40°C to +85°C; typical values at TA = 25°C, unless otherwise noted.
Table 1.
Parameter
VCC PIN
Operating Voltage Range, VVCC
Undervoltage Lockout, VUVLO
Undervoltage Lockout Hysteresis
Supply Current, IVCC
VIN1 TO VIN4 (VINx) PINS
Input Current
Input Threshold1
Input Glitch Immunity
Positive Glitch Duration
Negative Glitch Duration
UP, DOWN, AND UP/DOWN PINS
Input Current
Input Threshold1
Input Glitch Immunity
DLY_EN_OUTx AND BLANK_DLY PINS
Time Delay Accuracy
Time Delay Charge Current
Time Delay Threshold
Time Delay Discharge Resistor
OUT1 TO OUT4 (OUTx) PINS
Output Low Voltage, VOUTL
Leakage Current
VVCC That Guarantees Valid Outputs
PWRGD PIN
Output Low Voltage, VPWRGDL
Leakage Current
VVCC That Guarantees Valid Outputs
FAULT PIN
Input Threshold1
Input Glitch Immunity
Output Low Voltage, VFAULTL
Leakage Current
VVCC That Guarantees Valid Outputs
Min Typ Max Unit Test Conditions/Comments
2.7 3.3 5.5 V
2.46 V VVCC falling
50 mV
146 210 µA Steady state; sequence complete
−25
−100
0.5952
0.6000
+25
+100
0.6048
nA
nA
V
VVINx = 0 V to 1 V
VVINx = 0 V to 5.5 V; VVINx can be greater than VVCC
19.9 26.6 33.2 µs 50 mV input overdrive
2.75 4.7 6.6 µs 50 mV input overdrive
−100
1.372
3.3
2.7
1.4
6.8
4.9
+100
1.428
9.7
7.9
nA
V
µs
µs
VUP/DOWN = 0 V to 5.5 V; VUP/DOWN can be greater than VVCC
100 mV input overdrive
1 V input overdrive
59
14
1.4
450
% External capacitor values of 10 nF to 2.2 μF; excludes
external capacitor tolerance
µA
V
Ω
0.4 V VVCC = 2.7 V, ISINK = 2 mA
1 µA OUTx = 5.5 V
1 V Output is guaranteed to be either low (VOUTL = 0.4 V)
or giving a valid output level from VVCC = 1 V, ISINK =
30 µA or VVCC = 1.1 V, ISINK = 100 µA
0.4 V VVCC = 2.7 V, ISINK = 2 mA
1 µA PWRGD = 5.5 V
1 V Output is guaranteed to be either low (VPWRGDL = 0.4 V)
or giving a valid output level from VVCC = 1 V, ISINK =
30 µA or VVCC = 1.1 V, ISINK = 100 µA
1.372
3.1
1.4
5.6
1
1.428
8.1
0.4
1
V
µs
V
µA
V
1 V input overdrive
VVCC = 2.7 V, ISINK = 2 mA
FAULT = 5.5 V
Output is guaranteed to be either low (VFAULTL = 0.4 V)
or giving a valid output level from VVCC = 1 V, ISINK =
30 µA or VVCC = 1.1 V, ISINK = 100 µA
Rev. B | Page 4 of 28
5 Page 
ADM1186
6.0
5.8
5.6
5.4
5.2
5.0
VCC = 3.3V
4.8
4.6
4.4
4.2
4.0
–40
–20
0
20 40 60 80
TEMPERATURE (°C)
Figure 11. VINx Input Negative Glitch Immunity vs. Temperature
1.43
1.42
1.41
1.40
VCC = 3.3V
1.39
1.38
1.37
–40
–20
0 20 40
TEMPERATURE (°C)
60
80
Figure 12. UP, DOWN, UP/DOWN, FAULT, and Time Delay Trip Threshold
vs. Temperature
10.0
9.5
9.0
8.5
8.0
7.5
7.0
VCC = 3.3V
6.5
6.0
5.5
5.0
0
50 100 150
OVERDRIVE (mV)
200
Figure 13. UP, DOWN, and UP/DOWN Input Glitch Immunity
vs. Input Overdrive
Data Sheet
10.0
9.5
9.0
8.5
8.0
7.5
7.0
VCC = 3.3V
6.5
6.0
5.5
5.0
–40
–20
0 20 40
TEMPERATURE (°C)
60
80
Figure 14. UP, DOWN, and UP/DOWN Input Glitch Immunity vs. Temperature
10.0
9.5
9.0
8.5
8.0
7.5
7.0
6.5
VCC = 3.3V
6.0
5.5
5.0
0
200 400 600 800 1000
OVERDRIVE (mV)
Figure 15. FAULT Input Glitch Immunity vs. Input Overdrive
7.0
6.5
6.0
5.5 VCC = 3.3V
5.0
–40
–20
0 20 40
TEMPERATURE (°C)
60
80
Figure 16. FAULT Input Glitch Immunity vs. Temperature
Rev. B | Page 10 of 28
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet ADM1186.PDF ] | |
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