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PDF SI826X Data sheet ( Hoja de datos )
| Número de pieza | SI826X | |
| Descripción | 4.0 A ISOLATED GATE DRIVERS | |
| Fabricantes | Silicon Laboratories | |
| Logotipo |  |
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Si826x
5 KV LED EMULATOR INPUT, 4.0 A ISOLATED GATE DRIVERS
Features
Pin-compatible, drop-in upgrades for Robust protection features
popular high speed opto-coupled
Multiple UVLO ordering options
gate drivers
(5, 8, and 12 V) with hysteresis
Low power diode emulator simplifies 60 ns propagation delay,
design-in process
independent of input drive current
0.6 and 4.0 Amp peak output drive Wide VDD range: 5 to 30 V
current
3.75 and 5 kV reinforced isolation
Rail-to-rail output voltage
UL, CSA, VDE
Performance and reliability
AEC-Q100 qualified
advantages vs. opto-drivers
Wide operating temperature range
Resistant to temperature and age –40 to +125 °C
10x lower FIT rate for longer
service life
RoHS-compliant packages
14x tighter part-to-part matching
SOIC-8 (Narrow body)
DIP8 (Gull-wing)
Higher common-mode transient
SDIP6 (Stretched SO-6)
immunity: >50 kV/µs typical
LGA8
Applications
IGBT/ MOSFET gate drives
Industrial, HEV and renewable
energy inverters
AC, Brushless and DC motor
controls and drives
Variable speed motor control in
consumer white goods
Isolated switch mode and UPS
power supplies
Safety Regulatory Approvals (Pending)
UL 1577 recognized
VDE certification conformity
Up to 5000 Vrms for 1 minute
IEC60747-5-2/VDE0884 Part 10
CSA component notice 5A approval
(basic/reinforced insulation)
IEC 60950-1, 61010-1, 60601-1 CQC certification approval
(reinforced insulation)
GB4943.1
Description
The Si826x isolators are pin-compatible, drop-in upgrades for popular opto-
coupled gate drivers, such as 0.6 A ACPL-0302/3020, 2.5 A HCPL-3120/ACPL-
3130, HCNW3120/3130, and similar opto-drivers. The devices are ideal for driving
power MOSFETs and IGBTs used in a wide variety of inverter and motor control
applications. The Si826x isolated gate drivers utilize Silicon Laboratories'
proprietary silicon isolation technology, supporting up to 5.0 kVRMS withstand
voltage per UL1577. This technology enables higher-performance, reduced
variation with temperature and age, tighter part-to-part matching, and superior
common-mode rejection compared to opto-coupled gate drivers. While the input
circuit mimics the characteristics of an LED, less drive current is required,
resulting in higher efficiency. Propagation delay time is independent of input drive
current, resulting in consistently short propagation times, tighter unit-to-unit
variation, and greater input circuit design flexibility. As a result, the Si826x series
offers longer service life and dramatically higher reliability compared to opto-
coupled gate drivers.
Pin Assignments:
See page 24
1
ANODE 2
CATHODE 3
e
UVLO
8 VDD
7 VO
6 VO
NC 4
5 GND
SOIC-8, DIP8, LGA8
Industry Standard Pinout
ANODE 1
NC 2
e
CATHODE 3
6 VDD
UVLO
5 VO
4 GND
SDIP6
Industry Standard Pinout
Patent pending
Preliminary Rev. 0.9 4/13
Copyright © 2013 by Silicon Laboratories
Si826x
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Free Datasheet http://www.datasheet4u.com/
1 page  
Si826x
Table 2. Electrical Characteristics (Continued)1
VDD = 15 V or 30 V, GND = 0 V, IF = 6 mA, TA = –40 to +125 °C; typical specs at 25 °C
Parameter
Symbol
Test Conditions
Min Typ Max Units
Output High Current (Source)3,4
IOH
Si826xAxx devices (IF = 0),
(tPW_IOH < 250 ns)
— 0.4 —
(see Figure 2)
Si826xBxx devices (IF = 0),
A
(tPW_IOH < 250 ns),
(VDD – VO = 4 V)
0.5 1.8 —
(see Figure 2)
Output Low Current (Sink)3,4
IOL
Si826xAxx devices
(IF = 10 mA),
(tPW_IOL < 250 ns)
(see Figure 1)
Si826xBxx devices
(IF = 10 mA),
(tPW_IOL < 250 ns),
(VO - GND = 2.5 V)
(see Figure 1)
— 0.6 —
A
1.2 4.0 —
Si826xAxx devices
(I OUT = –100 mA)
—
VDD–
0.4
—
High-Level Output Voltage
VOH
Si826xBxx devices
(I OUT = –100 mA)
VDD– VDD–
0.5 0.25
—
V
Si826xBxx devices
(I OUT = 0 mA),
(IF = 0 mA)
— VDD —
Low-Level Output Voltage
Si826xAxx devices
(I OUT = 100 mA),
— 320 —
(IF = 10 mA)
VOL
Si826xBxx devices
mV
(I OUT = 100 mA),
(IF = 10 mA)
— 80 200
UVLO Threshold +
(Si826xxAx mode)
VDDUV+
See Figure 10 on page 17.
VDD rising
5 5.6 6.3 V
UVLO Threshold –
(Si826xxAx mode)
VDDUV–
See Figure 10 on page 17.
VDD falling
4.7 5.3 6.0 V
UVLO lockout hysteresis
(Si826xxAx mode)
VDDHYS
— 300 — mV
Notes:
1. See "8.Ordering Guide" on page 25 for more information.
2. Minimum value of (VDD - GND) decoupling capacitor is 1 µF.
3. Both VO pins are required to be shorted together for 4.0 A compliance.
4. When performing this test, it is recommended that the DUT be soldered to avoid trace inductances, which may cause
over-stress conditions.
Preliminary Rev. 0.9
5
Free Datasheet http://www.datasheet4u.com/
5 Page 
Si826x
Table 7. IEC Safety Limiting Values*
Parameter
Symbol
Test Condition
SOIC-8
Max
DIP8 SDIP6
Unit
LGA8
Case Temperature
TS
140 140 140 140
Input Current
IS JA = 110 °C/W (SOIC-8),
110 °C/W (DIP8),
105 °C/W (SDIP6),
220 °C (LGA8),
VF = 2.8 V, TJ = 140 °C,
TA = 25 °C
370
370 390 185
Output Power
PS
1 1 1 0.5
*Note: Maximum value allowed in the event of a failure; also see the thermal derating curve in Figures 4, 5, 6, and 7.
°C
mA
W
Preliminary Rev. 0.9
11
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11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SI826X.PDF ] | |
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