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PDF TSM121 Data sheet ( Hoja de datos )

Número de pieza TSM121
Descripción SINGLE CHIP PWM & HOUSEKEEPING IC
Fabricantes STMicroelectronics 
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TSM121
SINGLE CHIP PWM & HOUSEKEEPING IC
FOR HALF BRIDGE SMPS
s HOUSEKEEPING CIRCUIT :
s Over voltage protection for 3.3V, 5V and 12V
without external components
s Additional Over voltage protection (-5V and/
or -12V, or Primary Over Power control) with
external components
s Under voltage protection for 3.3V, 5V and
12V without external components
s Over current protection for 3.3V, 5V and 12V
with internal threshold voltage
s Externally adjustable Inrush Current blanking
during transients
s Externally adjustable Under voltage blanking
during Power Up
s Power Good output
s Externally adjustable PG delay
s Remote input
s Externally adjustable Remote delay
s Internal Precision Voltage Reference (Vref1)
s PWM GENERATOR :
s Error Amplifier (easy compensation)
s Oscillator (adjustable frequency)
s PWM generation
s Soft Start & Dead Time Control (adjustable)
s Open collector outputs for indirect Pulse
Transformer driving
s Precision Voltage Reference (Vref2) (Uncom-
mitted with Vref1)
DESCRIPTION
The TSM121 integrated circuit incorporates all
sensing circuit to regulate and protect from over
voltage, under voltage and over current a multiple
output power supply (12V, 5V, 3.3V).
TSM121 incorporates all the necessary functions
for proper PWM generation and pulse transformer
drive to be adapted easily in the PC SMPS power
supplies, and all the Housekeeping features which
allow safe operation in all conditions, and very
high integration.
TSM121 integrates two independent Voltage Ref-
erences which are uncommitted to ensure safe
Regulation and Protection by the same chip.
APPLICATION
s Primary PWM and secondary housekeeping
in PC/Server SMPS using Half Bridge topol-
ogy
ORDER CODE
Part Temperature
Number
Range
TSM121C 0 to 85°C
N = Dual in Line Package (DIP)
Package
N
Marking
TSM121C
N
DIP24 shrink
(Plastic Package)
PIN CONNECTIONS (top view)
C1 1
VCC 2
FB 3
IN- 4
IN+ 5
REM 6
TREM 7
TPG 8
PG 9
IS12 10
IS5 11
IS33 12
24 C2
23 SS/DTC
22 OSC
21 GND
20 VREF2
19 TSUR
18 TUV
17 PI
16 EP
15 VS12
14 VS5
13 VS33
January 2001
1/12
Free Datasheet http://www.datasheet4u.com/

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TSM121 pdf
TSM121
Symbol
Parameter
Test Condition
Trem2 Remote Adjustable Delay OFF to ON Load Capacitor
Crem=0.1µF
PWM SECTION
Min Typ Max
40 50 60
Voltage Reference (Vref2)
Vref2
Is
Ts
Regline
Voltage Reference
Current Stability = Load Regulation
Temperature Stability
Line Regulation
Iout Output Sourcing Current Capability
Iout = 0mA
Iout = 0mA to 10mA
Iout <10mA, Vcc=14 to
24V
2.46 2.5 2.54
20
17
10
15 30
Error Amplifier (IN+, IN-)
Vio
Iio
Iib
GBP
Vicm
CMR
Isink
Input Offset Voltage
Input Offset Current
Input Bias Current
Gain Bandwidth Product
Input Common Mode Voltage Range
Common Mode Rejection Ratio
Output Sink Current
Vout (Feedback) = 2.5V
Vout (Feedback) = 2.5V
Vout (Feedback) = 2.5V
RL = 2k, CL = 100pF
Vout (Feedback) = 0.7V
03
50
200
5
-0.3 3.5
80
1
PWM Comparator
max Maximum Duty Cycle
Vicmp Input Common Mode Voltage Range
Soft Start=0V
45 48 50
-0.3 3.5
Soft Start & Dead Time Control
Vssth Soft Start Voltage Threshold
Vicms Input Common Mode Voltage Range
Zero Duty Cycle
Maximum Duty Cycle
2.5
0
-0.3 3.5
Oscillator (OSC)
Freq Oscillator Frequency
Cf=220pF
70 100 140
Open Collector Outputs (C1, C2, Sink Current Only)
Icoh High Output Collector Leakage Current
Vcol Low Output Collector Saturation Voltage Collector Current = 20mA
tr C1, C2 rise time
tf C1, C2 fall time
0.5 2
0.2 0.5
1
1
Unit
ms
V
mV
mV
mV
mA
mV
nA
nA
MHz
V
dB
mA
%
V
V
V
kHz
µA
V
µs
µs
5/12
Free Datasheet http://www.datasheet4u.com/

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TSM121 arduino
TSM121
1.5. Output Driver - Open Collectors
The typical driving current from the TSM121 is
25mA. The recommended values of R12 to R16
are:
R12=R13=3.9k, R14=R15=7.5k, R16=2k
2. Housekeeping Circuit
The TSM121 Housekeeping Circuit is dedicated to
3.3V, 5V, and 12V power lines protection. It inte-
grates a Precision Voltage reference (indepen-
dent from the PWM generator circuit Voltage Ref-
erence), a triple Over current Protection circuit, a
triple Over voltage Protection circuit, and a triple
Under voltage Protection circuit, as well as all the
necessary logic and transient timing management
circuits for optimal and secure communication
with the motherboard, during start up, switch off
and stabilized conditions.
2.1. Over current protection circuit
The Over current protection circuit is made of 3
comparators with internal voltage thresholds re-
quiring 3 different Sense resistors in series with
the 3 different power lines. The thresholds are in-
ternally fixed to the Vcs33, Vcs5, Vcs12 values,
and the sense resistors need to be chosen de-
pending on the required over current limit. The
outputs of these three comparators are ORed, and
blanked by an internal delay circuitry (Surge Cur-
rent Blanking - Tsur) which can be adjusted with
external components (Rsur, Csur). Note that the
three Over current protection circuits are blanked
from current surges by the same delay circuit. This
allows that during power up, large inrush currents
are allowed during a short period of time corre-
sponding to the charging of capacitive loads (see
figure 3).
The maximum output currents of the 12V, 5V, and
3.3V lines are determined by Rs12, Rs5 and Rs33
respectively:
I12max = Vcs12 / Rs12
I5max = Vcs5 / Rs5
I33max = Vcs33 / Rs33
2.2. Over voltage protection circuit
The Over voltage protection circuit is made of
three comparators with internal voltage thresholds
(Vov33, Vov5, Vov12) which do not require any
external components for proper operation. The
outputs of these three comparators are ORed.
2.3. Under voltage protection circuit
The Under voltage protection circuit is made of
three comparators with internal voltage thresholds
(Vuv33, Vuv5, Vuv12) which do not require any
external components for proper operation. The
outputs of these three comparators are ORed, and
blanked by an internal delay circuitry (Power Up
UV Blanking - Tuv) which can be adjusted with ex-
ternal components (Cuv). This allows that during
power up, the under voltage protection circuit is in-
hibited.
2.4. Logic Interface
The Over current, Over voltage and Under voltage
circuits outputs are again ORed before activating
a Latch. When activated, this latch commands the
full switch OFF of the three main power lines
(3.3V, 5V, 12V) by an internal link between the
Housekeeping and the PWM circuits. Note that
the Under voltage circuit, after power up UV blank-
ing, bears no other delay to the Latch setting input
whereas the Over current and Over voltage cir-
cuits both bear an additional Tfault delay time.
This allows an efficient protection against Output
Short Circuit Conditions.
The Over current, Over voltage and Under voltage
circuits are all ORed to switch the Power Good
output active (PG) to warn the motherboard that
the voltage of at least one of the three power line
is out of range. The PG activation bears an inter-
nal Tpg delay circuitry which can be adjusted with
external components (Cpg)
Thanks to this information link to the motherboard,
a resetting signal to the latch is achievable with
the Remote pin (REM). When the Remote pin is
active, the internal Fault link between Housekeep-
ing circuit and the PWM generator is active (high:
PWM off), the PG pin is active (high). Note that to
reset effectively the Latch, a minimum width Re-
mote pulse should be applied thanks to an internal
delay circuitry (Trem) which can be adjusted with
external components (Crem).
2.5. Additional circuits:
A Power Input (PI) is available for a supplementa-
ry power condition supervision. For example, the
supervision of the Vcc power supply line.
An Extra Protection (EP) circuit is available for an
additional input power protection. For example,
this operator can be used for the supervision of
the primary input power via an additional wiring at
the foot of the power half bridge. This operator can
also be used for the supervision of eventual nega-
tive power lines (ex: -5V or -12V).
11/12
Free Datasheet http://www.datasheet4u.com/

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