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부품번호 | STD8NM50N 기능 |
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기능 | N-channel Power MOSFET | ||
제조업체 | STMicroelectronics | ||
로고 | |||
전체 19 페이지수
STD8NM50N, STP8NM50N, STU8NM50N
N-channel 500 V, 0.73 Ω typ., 5 A MDmesh™II Power MOSFET
in DPAK, TO-220 and IPAK packages
Datasheet — production data
Features
Order codes
STD8NM50N
STP8NM50N
STU8NM50N
VDSS@TJMAX RDS(on)max.
550 V
< 0.79 Ω
ID
5A
■ 100% avalanche tested
■ Low input capacitance and gate charge
■ Low gate input resistance
Applications
■ Switching applications
TAB
3
1
DPAK
TAB
3
2
1
TO-220
TAB
3
2
1
IPAK
Description
These devices are N-channel Power MOSFETs
developed using the second generation of
MDmesh™ technology. This revolutionary Power
MOSFET associates a vertical structure to the
company’s strip layout to yield one of the world’s
lowest on-resistance and gate charge. It is
therefore suitable for the most demanding high
efficiency converters.
Figure 1. Internal schematic diagram
$ 4!"
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3
!-V
Table 1. Device summary
Order codes
STD8NM50N
STP8NM50N
STU8NM50N
Marking
8NM50N
Packages
DPAK
TO-220
IPAK
Packaging
Tape and reel
Tube
September 2012
This is information on a product in full production.
Doc ID 17413 Rev 6
1/19
www.st.com
19
Free Datasheet http://www.datasheet4u.com/
Electrical characteristics
2 Electrical characteristics
STD8NM50N, STP8NM50N, STU8NM50N
(TC = 25 °C unless otherwise specified)
Table 5. On /off states
Symbol
Parameter
Test conditions
V(BR)DSS
IDSS
IGSS
VGS(th)
RDS(on)
Drain-source
breakdown voltage
(VGS = 0)
ID = 1 mA
Zero gate voltage
VDS = 500 V
drain current (VGS = 0) VDS = 500 V, TC = 125 °C
Gate-body leakage
current (VDS = 0)
VGS = ± 25 V
Gate threshold voltage VDS = VGS, ID = 250 µA
Static drain-source on
resistance
VGS = 10 V, ID = 2.5 A
Min. Typ. Max. Unit
500 V
1 µA
100 µA
± 100 nA
2 3 4V
0.73 0.79 Ω
Table 6. Dynamic
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS = 50 V, f = 1 MHz,
VGS = 0
364 pF
- 33 - pF
1.2 pF
Equivalent output
Coss(eq)(1) capacitance time
related
VDS = 0 to 50 V, VGS = 0
- 147.5 - pF
RG
Intrinsic gate
resistance
f = 1 MHz open drain
- 5.4 - Ω
Qg Total gate charge
VDD = 400 V, ID = 5 A,
Qgs Gate-source charge VGS = 10 V
Qgd Gate-drain charge
(see Figure 16)
14 nC
- 3 - nC
7 nC
1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
4/19 Doc ID 17413 Rev 6
Free Datasheet http://www.datasheet4u.com/
4페이지 STD8NM50N, STP8NM50N, STU8NM50N
Electrical characteristics
Figure 8. Static drain-source on resistance Figure 9. Gate charge vs gate-source voltage
RDS(on)
(Ω)
AM07919v1
0.77
0.76
0.75
VGS=10V
0.74
0.73
0.72
0.71
0.7
0.69
0
1 2 3 4 5 ID(A)
VGS
(V)
12
VDS
10
8
VDD=400 V
ID=5 A
AM03195v1
400
350
300
250
6 200
150
4
100
2 50
00
0 5 10 15 Qg(nC)
Figure 10. Capacitance variations
Figure 11. Output capacitance stored energy
C
(pF)
AM07921v1
E
(μJ)
AM07922v1
1000
Ciss 2
100
Coss
10
Crss
1
0 1 10 100 VDS(V)
1
0
0 100 200 300 400 500 VDS(V)
Figure 12. Normalized gate threshold voltage
vs temperature
VGS(th)
(norm)
AM07923v1
ID = 250 µA
Figure 13. Normalized on resistance vs
temperature
RDS(on)
(norm)
2.1
ID = 2.5 A
AM07924v1
1.00 1.7
0.90 1.3
0.80
0.70
-50 -25 0 25 50 75 100 TJ(°C)
0.9
0.5
-50 -25 0 25 50 75 100 TJ(°C)
Doc ID 17413 Rev 6
7/19
Free Datasheet http://www.datasheet4u.com/
7페이지 | |||
구 성 | 총 19 페이지수 | ||
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부품번호 | 상세설명 및 기능 | 제조사 |
STD8NM50N | N-channel Power MOSFET | STMicroelectronics |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |