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PDF CS4331 Data sheet ( Hoja de datos )

Número de pieza CS4331
Descripción (CS4330 - CS4333) 8-Pin Stereo D/A Converter
Fabricantes CRYSTAL 
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CS4330 CS4331
CS4333
8-Pin Stereo D/A Converter for Digital Audio
Features
Complete Stereo DAC System:
Interpolation, D/A, Output Analog
Filtering
18-Bit Resolution
94 dB Dynamic Range
0.003% THD
Low Clock Jitter Sensitivity
Single +3V or +5V Power Supply
Filtered Line Level Outputs
Linear Phase Filtering
On-Chip Digital De-emphasis
General Description
The CS4330, CS4331 and CS4333 are complete, ste-
reo digital-to-analog output systems including
interpolation, 1-bit D/A conversion and output analog
filtering in an 8-pin package. These devices differ in
the serial interface format used to input audio data.
The CS4330, CS4331 and CS4333 are based on
delta-sigma modulation, where the modulator output
controls the reference voltage input to an ultra-linear
analog low-pass filter. This architecture allows for infi-
nite adjustment of sample rate between 2 kHz and
50 kHz while maintaining linear phase response simply
by changing the master clock frequency.
The CS4330, CS4331 and CS4333 contain on-chip
digital de-emphasis, operate from a single +3V or +5V
power supply, and consume only 60 mW of power with
a 3V power supply. These features make them ideal
for portable CD players and other portable playback
systems.
ORDERING INFORMATION: See page 21.
LRCK
SDATA
3
1
Serial Input
Interface
Interpolator
DEM/SCLK
2
De-
emphasis
DDMeellottaad--uSSlaiiggtommraa
Modulator
AGND VA+
67
Voltage Reference
DAC
Analog
Low-Pass
Filter
AOUTL
8
Interpolator
Delta-Sigma
Modulator
4
MCLK
DAC
Analog
Low-Pass
AOUTR
Filter
5
Crystal Semiconductor Corporation
P.O. Box 17847, Austin, TX 78760
(512) 445-7222 Fax: (512) 445-7581
http://www.crystal.com
Copyright © Crystal Semiconductor Corporation 1997
(All Rights Reserved)
MAY ’97
DS136F1
1
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CS4331 pdf
CS4330, CS4331, CS4333
DIGITAL CHARACTERISTICS (TA = 25 °C; VA+ = 2.7V - 5.5V)
Parameter
Symbol
Min
Typ
Max Units
High-Level Input Voltage
Low-Level Input Voltage
Input Leakage Current
(VA+ = 5.5V)
VIH
2.4
-
(VA+ = 5.0V)
VIH
2.0
-
-V
-V
VIL - - 0.8 V
(Note 7)
Iin
- - ±10 µA
Notes: 7. Iin for CS4331 LRCK is ± 20 µA max.
ABSOLUTE MAXIMUM RATINGS (AGND = 0V; all voltages with respect to ground.)
DC Power Supply:
Parameter
Symbol
VA+
Min
-0.3
Max
6.0
Input Current, Any Pin Except Supplies
Iin -
±10
Digital Input Voltage
VIND
-0.3 (VA+)+0.4
Ambient Operating Temperature (power applied)
TA -55
125
Storage Temperature
Tstg -65
150
WARNING: Operation at or beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
Units
V
mA
V
°C
°C
RECOMMENDED OPERATING CONDITIONS (AGND = 0V; all voltages with respect to
ground)
Parameter
Symbol
Min
Typ
Max Units
DC Power Supply:
(3V mode)
(5V mode)
VA+
VA+
2.7 3.0
4.75 5.0
4.0
5.5
V
V
DS136F1
5
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CS4331 arduino
CS4330, CS4331, CS4333
LRCK
SCLK
SDATA
Left Channel
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Right Channel
17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
External SCLK Mode
I2S, 18-Bit Data
Data Valid on Rising Edge of SCLK
SCLK must have at least 36 cycles per LRCK
Figure 6. CS4331 External SCLK Data Format (I2S)
LRCK
SCLK
SDATA
Left Channel
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Right Channel
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Internal SCLK Mode
Right Justified, 16-Bit Data
Data Valid on Rising Edge of SCLK
INT SCLK = 32 Fs if MCLK/LRCK = 512 or 256
INT SCLK = 48 Fs if MCLK/LRCK = 384
External SCLK Mode
Right Justified, 16-Bit Data
Data Valid on Rising Edge of SCLK
SCLK must have at least 32 cycles per LRCK
Figure 7. CS4333 SCLK Data Format
DS136F1
11
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