|
|
PDF SH69P23 Data sheet ( Hoja de datos )
| Número de pieza | SH69P23 | |
| Descripción | OTP 4-bit Microcontroller | |
| Fabricantes | SINO | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de SH69P23 (archivo pdf) en la parte inferior de esta página. Total 29 Páginas | ||
|
No Preview Available !
SH69P23
PRELIMINARY
OTP 4-bit Microcontroller
Features
SH6610C-based single-chip 4-bit micro-controller
OTPROM: 4K X 16 bits
RAM: 160 X 4 bits (data memory)
Operation voltage: 2.4V - 6.0V (typical 3.0V or 5.0V)
14 CMOS bi-directional I/O pins
Built in pull-up and pull-low resistor for PortA ~ PortF
4-level subroutine nesting (including interrupts)
One 8-bit auto re-load timer/counter
Warm-up timer for power on reset
Powerful interrupt sources:
- Internal interrupt (Timer0)
- External interrupts: PortB & PortC (rising/falling edge)
Oscillator (OTP option)
- X`tal oscillator:
32.768KHz - 4MHz
- Ceramic resonator: 400K - 4MHz
- RC oscillator:400K - 4MHz
- External clock:
30K - 4MHz
Instruction cycle time:
- 4/32.768KHz(122us) for 32.768KHz OSC clock
- 4/4MHz (1us) for 4MHz OSC clock
Two low power operation modes: HALT and STOP
Built-in watch dog timer (OTP option)
Built-in power on reset
Two LPD level(OTP option)
- High level: 4.0V
- Low level: 2.5V
OTP type &Code protection
General Description
SH69P23 is a 4-bit micro controller. This chip integrates the SH6610C 4-bit CPU core with SRAM, 4K OTPROM, Timer and I/O
Ports.
Pin Configuration
PF1
PA2
PA3
T0
RESET/ VPP
GND
PB0
PB1
PB2
PB3
1
2
3
4
5
6
7
8
9
10
20 PF0
19 PA1
18 PA0 / SDA
17 OSCI / SCK
16 OSCO
15 VDD
14 PC3
13 PC2
12 PC1
11 PC0
1 V1.0
Free Datasheet http://www.datasheet4u.com/
1 page  
SH69P23
3. RAM
The built-in RAM consists of general-purpose data memory and the system register. Direct addressing in one instruction can
access both data memory and the system register.
The following is the memory allocation map:
$000 - $01F: System register and I/O.
$020 - $0BF: Data memory (160 X 4 bits, divided into 2 banks. $020 - $07F: bank0, $080 - $0BF: bank1).
(a). The Configuration of the System Register
Address Bit3 Bit2 Bit1 Bit0 R/W
Remarks
$00 - IET0 -
IEP R/W Interrupt enable flags
$01
- IRQT0 -
IRQP R/W Interrupt request flags
$02 - TM0.2 TM0.1 TM0.0 R/W Timer0 Mode register (Prescaler)
$03 - - - - - Reserved
$04 TL0.3 TL0.2 TL0.1 TL0.0 R/W Timer0 load/counter register low digit
$05 TH0.3 TH0.2 TH0.1 TH0.0 R/W Timer0 load/counter register high digit
$06-$07
-
-
-
- - Reserved
$08 PA.3 PA.2 PA.1 PA.0 R/W PORTA
$09 PB.3 PB.2 PB.1 PB.0 R/W PORTB
$0A PC.3 PC.2 PC.1 PC.0 R/W PORTC
$0B~$0C
$0D
-
Bit0-3 is reserved,Always keep it to “0”
in the User’s program.
Refer to I/O notice
-
PF.1
PF.0 R/W PORTF
$0E TBR.3 TBR.2 TBR.1 TBR.0 R/W Table Branch Register
$0F INX.3 INX.2 INX.1 INX.0 R/W Pseudo index register
$10 DPL.3 DPL.2 DPL.1 DPL.0 R/W Data pointer for INX low nibble
$11 - DPM.2 DPM.1 DPM.0 R/W Data pointer for INX middle nibble
$12
$13 - $14
DPH.2
DPH.1
DPH.0
R/W
Data pointer for INX high nibble
Reserved
Bit1:PBC interrupt rising / failing edge set
$15 PULLEN PH/PL PBCFR
- R/W Bit2:Port pull-hi/low set
Bit3: Port pull-up/low enable control
$16 PA3OUT PA2OUT PA1OUT PA0OUT R/W PortA input/output control 0: input 1: output
$17 PB3OUT PB2OUT PB1OUT PB0OUT R/W PortB input/output control 0: input 1: output
$18 PC3OUT PC2OUT PC1OUT PC0OUT R/W PortC input/output control 0: input 1: output
$19~$1A
$1B -
$1C -
$1D -
$1E WDT
Bit0-3 is reserved,Always keep it to “1”
in the User’s program.
Refer to I/O notice
- PF1OUT PF0OUT R/W PortF input/output control 0: input 1: output
-
T0S
T0E
R/W Bit0: T0 signal edge;
Bit1: T0 signal source
- - - - Reserved
- - - W Bit3: WDT timer reset (write 1 to reset WDT)
$1F - - - - - Reserved
* System Register $00 - $12 (except $07H) refer to "SH6610C User manual".
5
Free Datasheet http://www.datasheet4u.com/
5 Page 
6. T0 & WDT
System Register $1C
Address
$1C
BIT3
-
BIT2
-
BIT1
T0S
BIT0
T0E
T0E: T0 signal edge
0: Increment on low-to-high transition T0 pin (Power on initial)
1: Increment on high-to-low transition T0 pin
T0S: T0 signal source.
0: OSC 1/4 (Power on initial).
1: Transition on T0 pin.
R/W
Remark
W
Bit0: T0 signal edge
Bit1: T0 signal source
T0
TOE
OSC/4
EOR
T0S
0
M
U
1X
Built-in RC
Oscillator
WDT Enable
(OTP option )
WDT reset
WDT & Warm
Up Counter
TIMER0 (8bits)
3
TM0 [2:0]
3
SH69P23
WDT Timeout
System Register $1E
Address Bit3 Bit2 Bit1 Bit0 R/W
Remark
$1E WDT - - - W Bit3: Watchdog timer reset. (write 1 to reset WDT)
The input clock of the watchdog timer is generated by a built-in RC oscillator so that the WDT will always run even in the STOP
mode. SH69P23 generates a RESET condition when the watchdog times-out. The watchdog can be enabled or disabled
permanently by using the OTP option. To prevent it timing out and generating a device RESET condition, you should write this
bit as “1” before timing-out. The WDT has a time-out period of more than 7ms(typical 18ms) . If longer time-out periods are
desired, a prescaler with a division ratio of up to 1:2048 can be assigned to the WDT under software controll by writing to the
TM0 register.
11
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet SH69P23.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| SH69P20 | OTP 4-bit Microcontroller |  Sino |
| SH69P20C | OTP 1K 4-bit Microcontroller |  Sino Wealth |
| SH69P21 | OTP 1K 4-bit Microcontroller | Sino Wealth |
| SH69P23 | OTP 4-bit Microcontroller | SINO |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |