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PDF DAP008 Data sheet ( Hoja de datos )
| Número de pieza | DAP008 | |
| Descripción | PWM Current-Mode Controller | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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Customer Specific Device from ON Semiconductor
DAP008 Maximus
PWM Current−Mode
Controller for High−Power
Universal Off−Line Supplies
Housed in an SO−8 package, the DAP008 represents a
major leap toward ultra−compact Switch−Mode Power
Supplies. Due to its novel concept, the circuit allows the
implementation of complete off−line AC/DC adapters,
battery charger or a high−power SMPS with few external
components. Due to its high drive capability, Maximus is
not afraid by 30 nC gate charge MOSFETs which, together
with internal ramp compensation and built−in frequency
jittering, ease the design of high power AC/DC adapters.
With an internal structure operating at a fixed 65 kHz, the
controller supplies itself from the high−voltage rail,
avoiding the need of an auxiliary winding. This feature
naturally eases the designer task in battery charger
applications. Finally, current−mode control provides an
excellent audio−susceptibility and inherent pulse−by−pulse
control.
When the current setpoint falls below a given value, e.g.
the output power demand diminishes, the IC automatically
enters the so−called skip cycle mode and provides excellent
efficiency at light loads. Because this occurs at a user
adjustable low peak current, no acoustic noise takes place.
The DAP008 features two efficient protective circuitries:
1. In presence of an overcurrent condition, the output
pulses are disabled and the device enters a safe
burst mode, trying to restart. Once the default has
gone, the device auto−recovers.
2. If an external signal (e.g. a temperature sensor)
pulls the Adj pin above 3.2 V, the output pulses are
immediately stopped and the DAP008 stays
latched in this position. Reset occurs when the
VCC collapses to ground, e.g. the user unplugs the
power supply.
Features
• No Auxiliary Winding Operation
• Internal Ramp Compensation
• Built−in Frequency Jittering for Lower EMI
• Internal 1.0 ms Typical Soft−Start
• Auto−Recovery Internal Output Short−Circuit
Protection
• Full Latchoff if Adj Pin is Brought High
• Extremely Low No−Load Standby Power
• Current−Mode with Skip−Cycle Capability
• Internal Temperature Shutdown
• Internal Leading Edge Blanking
• 500 mA Peak Current Capability
• Internally Fixed Frequency at 65 kHz
• Direct Optocoupler Connection
• SPICE Models Available for TRANsient and AC
Analysis
• Pb−Free Package is Available
Typical Applications
• High Power AC/DC Adapters for Notebooks, etc.
• Offline Battery Chargers
• Auxiliary Power Supplies (USB, Appliances, TVs, etc.)
8
1
SO−8
D SUFFIX
CASE 751
A
Y
WW
MARKING
DIAGRAM
8
DAP08
AYWW
1
= Assembly Location
= Year
= Work Week
PIN CONNECTIONS
Adj 1
FB 2
CS 3
GND 4
8 HV
7 NC
6 VCC
5 Drv
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions
section on page 13 of this data sheet.
© Semiconductor Components Industries, LLC, 2007
March, 2007 − Rev. 6
1
Publication Order Number:
DAP008/D
Free Datasheet http://www.datasheet4u.com/
1 page  
DAP008 Maximus
880
860
840
820
800
780
760
740
720
700−5
25 50 75 100
TEMPERATURE (°C)
Figure 3. No Load Current Consumption
vs. Temperature
125
1.54
1.52
1.50
1.48
1.46
1.44
1.42
1.40
1.38
1.36
1.34
−5
25 50 75 100
TEMPERATURE (°C)
125
Figure 4. 1.0 nF Load Current Consumption
vs. Temperature
13.0 11.0
12.8 10.8
12.6 10.6
12.4 10.4
12.2 10.2
12.0−5
25 50 75 100
TEMPERATURE (°C)
Figure 5. VCCOFF Level Variation
vs. Temperature
125 10.0−5
25 50 75 100
TEMPERATURE (°C)
Figure 6. VCCON Level Variation
vs. Temperature
125
8.5
8.0
7.5
7.0
6.5
6.0
5.5
5.0−5
25 50 75 100
TEMPERATURE (°C)
Figure 7. Startup Current Evolution with
Junction Temperature
125
35
30
25
20
15
10−5
25 50 75 100 125
TEMPERATURE (°C)
Figure 8. Drive Output Impedance Behavior
with Junction Temperature
http://onsemi.com
5
Free Datasheet http://www.datasheet4u.com/
5 Page 
DAP008 Maximus
Soft−Start
The DAP008 features an internal 1ms soft−start activated
during the power on sequence (PON). As soon as VCC
reaches VCCOFF , the peak current is gradually increased
from nearly zero up to the maximum clamping level (e.g.
1.0 V). This situation lasts during 1ms and further to that
time period, the peak current limit is blocked to 1.0 V until
the supply enters regulation. The soft−start is also activated
during the over current burst (OCP) sequence. Every restart
attempt is followed by a soft−start activation. Generally
speaking, the soft−start will be activated when VCC ramps
up either from zero (fresh power−on sequence) or 6.0 V, the
latch−off voltage occurring during OCP. Figure 22 portrays
the soft−start behavior. The time scales are purposely shifted
to offer a better zoom portion.
VCC 12 V
0 V (fresh PON)
or
6.0 V (OCP)
Current
Sense
Max Ip
1.0 ms
Figure 22. Soft−Start is Activated During a Startup Sequence or an OCP Condition
Power Dissipation
The DAP008 is directly supplied from the DC rail through
the internal DSS circuitry. The current flowing through the
DSS is therefore the direct image of the DAP008 current
consumption. The total power dissipation can be evaluated
using: (VHVDC * 11 V) · ICC2. If we operate the device on
a 250 VAC rail, the maximum rectified voltage can go up to
350 VDC. However, as the characterization curves show,
the current consumption drops at high junction temperature,
which quickly occurs due to the DSS operation. At TJ =
50°C, ICC2 = 1.7 mA. As a result, the DAP008 will
dissipate 350 . 1.7 mA @ TJ = 50°C = 595 mW. The SO−8
package offers a junction−to−ambient thermal resistance
RqJA of 178°C/W. Adding some copper area around the PCB
footprint will help decreasing this number: 12 mm x 12 mm
to drop RqJA down to 100°C/W with 35 m copper thickness
(1 oz.) or 6.5 mm x 6.5 mm with 70 m copper thickness
(2 oz.). With this later number, we can compute the
maximum power dissipation the package accepts at an
ambient of 50°C:
PMAX
+
TJMAX * TAMAX
RqJA
+
750
mW
Which is okay with our previous budget. However, ICC2
is based on a 1.0 nF output capacitor. As seen before,
ICC2 will depend on your MOSFET’s Qg:
ICC2 [ ICC1 ) FSW Qg. Final calculation shall thus
accounts for the total gate−charge Qg your MOSFET will
exhibit.
If the power estimation is finally beyond the limit, other
solutions are possible: a) add a series diode with pin 8 (as
suggested in the above lines) to drop the average input
voltage and lower the dissipation to:
350 @
p
2
@
1.7
m
+
380
mW
b) put an auxiliary winding to disable the DSS and decrease
the power consumption to VCC x ICC2. The auxiliary level
should be thus that the rectified auxiliary voltage
permanently stays above 10 V (to not reactivate the DSS)
and is safely kept below the 16 V maximum rating.
http://onsemi.com
11
Free Datasheet http://www.datasheet4u.com/
11 Page | ||
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| PDF Descargar | [ Datasheet DAP008.PDF ] | |
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