PDF AD9249 Data sheet ( Hoja de datos )

Número de pieza	AD9249
Descripción	1.8 V ADC
Fabricantes	Analog Devices
Logotipo
Hay una vista previa y un enlace de descarga de AD9249 (archivo pdf) en la parte inferior de esta página. Total 36 Páginas
No Preview Available ! Data Sheet FEATURES Low power 16 ADC channels integrated into 1 package 58 mW per channel at 65 MSPS with scalable power options 35 mW per channel at 20 MSPS SNR: 75 dBFS (to Nyquist); SFDR: 90 dBc (to Nyquist) DNL: ±0.6 LSB (typical); INL: ±0.9 LSB (typical) Crosstalk, worst adjacent channel, 10 MHz, −1 dBFS: −90 dB typical Serial LVDS (ANSI-644, default) Low power, reduced signal option (similar to IEEE 1596.3) Data and frame clock outputs 650 MHz full power analog bandwidth 2 V p-p input voltage range 1.8 V supply operation Serial port control Flexible bit orientation Built in and custom digital test pattern generation Programmable clock and data alignment Power-down and standby modes APPLICATIONS Medical imaging Communications receivers Multichannel data acquisition GENERAL DESCRIPTION The AD9249 is a 16-channel, 14-bit, 65 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit that is designed for low cost, low power, small size, and ease of use. The device operates at a conversion rate of up to 65 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical. The ADC requires a single 1.8 V power supply and an LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications. The AD9249 automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. Data clock outputs (DCO±1, DCO±2) for capturing data on the output and frame clock outputs (FCO±1, FCO±2) for signaling a new output byte are provided. Individual channel power-down is supported, and the device typically consumes less than 2 mW when all channels are disabled. 16 Channel, 14-Bit, 65 MSPS, Serial LVDS, 1.8 V ADC AD9249 SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM AVDD PDWN DRVDD VIN+A1 VIN–A1 VIN+A2 VIN–A2 ADC 14 SERIAL LVDS AD9249 ADC 14 SERIAL LVDS D+A1 D–A1 D+A2 D–A2 VIN+H1 VIN–H1 VIN+H2 VIN–H2 ADC 14 SERIAL LVDS ADC 14 SERIAL LVDS VREF SENSE VCM1, VCM2 SYNC REF SELECT 1.0V SERIAL PORT INTERFACE DATA RATE MULTIPLIER RBIAS1, RBIAS2 GND CSB1, SDIO/ SCLK/ CSB2 DFS DTP Figure 1. CLK+ CLK– D+H1 D–H1 D+H2 D–H2 FCO+1, FCO+2 FCO–1, FCO–2 DCO+1, DCO+2 DCO–1, DCO–2 The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI). The AD9249 is available in an RoHS-compliant, 144-ball CSP- BGA. It is specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent. PRODUCT HIGHLIGHTS 1. Small Footprint. Sixteen ADCs are contained in a small, 10 mm × 10 mm package. 2. Low Power. 35 mW/channel at 20 MSPS with scalable power options. 3. Ease of Use. Data clock outputs (DCO±1, DCO±2) operate at frequencies of up to 455 MHz and support double data rate (DDR) operation. 4. User Flexibility. SPI control offers a wide range of flexible features to meet specific system requirements. Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2013 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com Free Datasheet http://www.datasheet4u.com/ 1 page Data Sheet AD9249 AC SPECIFICATIONS AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = −1.0 dBFS, unless otherwise noted. Table 2. Parameter 1 SIGNAL-TO-NOISE RATIO (SNR) fIN = 9.7 MHz fIN = 19.7 MHz fIN = 48 MHz fIN = 69.5 MHz fIN = 118 MHz fIN = 139.5 MHz SIGNAL-TO-NOISE AND DISTORTION RATIO (SINAD) fIN = 9.7 MHz fIN = 19.7 MHz fIN = 48 MHz fIN = 69.5 MHz fIN = 118 MHz fIN = 139.5 MHz EFFECTIVE NUMBER OF BITS (ENOB) fIN = 9.7 MHz fIN = 19.7 MHz fIN = 48 MHz fIN = 69.5 MHz fIN = 118 MHz fIN = 139.5 MHz SPURIOUS-FREE DYNAMIC RANGE (SFDR) fIN = 9.7 MHz fIN = 19.7 MHz fIN = 48 MHz fIN = 69.5 MHz fIN = 118 MHz fIN = 139.5 MHz WORST HARMONIC (SECOND OR THIRD) fIN = 9.7 MHz fIN = 19.7 MHz fIN = 48 MHz fIN = 69.5 MHz fIN = 118 MHz fIN = 139.5 MHz WORST OTHER (EXCLUDING SECOND OR THIRD) fIN = 9.7 MHz fIN = 19.7 MHz fIN = 48 MHz fIN = 69.5 MHz fIN = 118 MHz fIN = 139.5 MHz TWO-TONE INTERMODULATION DISTORTION (IMD)—AIN1 AND AIN2 = −7.0 dBFS fIN1 = 30.1 MHz, fIN2 = 32.1 MHz CROSSTALK, WORST ADJACENT CHANNEL2 Crosstalk, Worst Adjacent Channel Overrange Condition3 ANALOG INPUT BANDWIDTH, FULL POWER Temp 25°C Full 25°C 25°C 25°C 25°C 25°C Full 25°C 25°C 25°C 25°C 25°C Full 25°C 25°C 25°C 25°C 25°C Full 25°C 25°C 25°C 25°C 25°C Full 25°C 25°C 25°C 25°C 25°C Full 25°C 25°C 25°C 25°C 25°C 25°C 25°C 25°C Min Typ Max 75.4 74.4 75.3 74.7 74.4 72.8 72.2 75.4 74.0 75.3 74.7 74.4 72.6 71.8 12.2 12.0 12.2 12.1 12.1 11.8 11.6 95 85 93 94 92 83 82 −98 −93 −85 −94 −92 −83 −82 −95 −96 −86 −94 −92 −90 −90 92 −90 −85 650 1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and for details on how these tests were completed. 2 Crosstalk is measured at 10 MHz, with −1.0 dBFS analog input on one channel and no input on the adjacent channel. 3 Overrange condition is defined as 3 dB above input full scale. Unit dBFS dBFS dBFS dBFS dBFS dBFS dBFS dBFS dBFS dBFS dBFS dBFS Bits Bits Bits Bits Bits Bits dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dBc dB dB MHz Rev. 0 \| Page 5 of 36 Free Datasheet http://www.datasheet4u.com/ 5 Page Data Sheet AD9249 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS AD9249 TOP VIEW (Not to Scale) 1 2 3 4 5 6 7 8 9 10 11 12 A VIN–G2 VIN+G2 VIN–G1 VIN–F2 VIN–F1 VIN–E2 VIN–E1 VIN–D2 VIN–D1 VIN–C2 VIN+C1 VIN–C1 B VIN–H1 VIN+H1 VIN+G1 VIN+F2 VIN+F1 VIN+E2 VIN+E1 VIN+D2 VIN+D1 VIN+C2 VIN+B2 VIN–B2 C VIN–H2 VIN+H2 SYNC VCM1 VCM2 VREF SENSE RBIAS1 RBIAS2 GND VIN+B1 VIN–B1 D GND GND GND AVDD AVDD AVDD AVDD AVDD AVDD GND VIN+A2 VIN–A2 E CLK– CLK+ GND AVDD GND GND GND GND AVDD CSB1 VIN+A1 VIN–A1 F GND GND GND AVDD GND GND GND GND AVDD CSB2 SDIO/DFS SCLK/DTP G D–H2 D+H2 GND AVDD GND GND GND GND AVDD PDWN D+A1 D–A1 H D–H1 D+H1 GND AVDD GND GND GND GND AVDD GND D+A2 D–A2 J D–G2 D+G2 GND AVDD AVDD AVDD AVDD AVDD AVDD GND D+B1 D–B1 K D–G1 D+G1 DRVDD DRVDD GND GND GND GND DRVDD DRVDD D+B2 D–B2 L D–F2 D+F2 D+E2 D+E1 FCO+1 DCO+1 DCO+2 FCO+2 D+D2 D+D1 D+C1 D–C1 M D–F1 D+F1 D–E2 D–E1 FCO–1 DCO–1 DCO–2 FCO–2 D–D2 D–D1 D+C2 Table 8. Pin Function Descriptions Pin No. Mnemonic C10, D1 to D3, D10, E3, E5 to E8, F1 to F3, F5 to F8, G3, G5 to G8, H3, H5 to H8, H10, J3, J10, K5 to K8 GND D4 to D9, E4, E9, F4, F9, G4, G9, H4, H9, J4 to J9 AVDD K3, K4, K9, K10 DRVDD E1, E2 CLK−, CLK+ G12, G11 D−A1, D+A1 H12, H11 D−A2, D+A2 J12, J11 D−B1, D+B1 K12, K11 D−B2, D+B2 L12, L11 D−C1, D+C1 Figure 6. Pin Configuration Description Ground. 1.8 V Analog Supply. 1.8 V Digital Output Driver Supply. Input Clock Complement, Input Clock True. Bank 1 Digital Output Complement, Bank 1 Digital Output True. Bank 2 Digital Output Complement, Bank 2 Digital Output True. Bank 1 Digital Output Complement, Bank 1 Digital Output True. Bank 2 Digital Output Complement, Bank 2 Digital Output True Bank 1 Digital Output Complement, Bank 1 Digital Output True. D–C2 Rev. 0 \| Page 11 of 36 Free Datasheet http://www.datasheet4u.com/ 11 Page

Páginas	Total 36 Páginas
PDF Descargar	[ Datasheet AD9249.PDF ]

Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
AD9240	Monolithic A/D Converter	Analog Devices
AD9241	Complete 14-Bit/ 1.25 MSPS Monolithic A/D Converter	Analog Devices
AD9243	Monolithic A/D Converter	Analog Devices
AD9244	14-Bit 40/65 MSPS Monolithic A/D Converter	Analog Devices

Número de pieza	Descripción	Fabricantes
SLA6805M	High Voltage 3 phase Motor Driver IC.	Sanken
SDC1742	12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.	Analog Devices

DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.

DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar