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ATC35 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 ATC35
기능 Cell-based ASIC
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ATC35 데이터시트, 핀배열, 회로
Features
Comprehensive Library of Standard Logic Cells
ATC35 I/O Cells Designed to Operate with VDD = 3.3V ± 0.3V as Main Target Operating
Conditions
IO35 Pad Library Provides Interface to 5V Environment
Oscillators and Phase Locked Loops for Stable Clock Sources
Memory Cells Compiled to the Precise Requirements of the Design
Compatible with Atmel’s Extensive Range of Microcontroller, DSP, Standard Interface
and Application Specific Cells
High-Performance Analog Cells can be Developed on Request
Description
The Atmel ATC35 (AT56K) process is a proprietary 0.35 micron three-layer-metal
CMOS process intended for use with a supply voltage of 3.3V ± 0.3V. The following
table shows the range for which Atmel library cells have been characterized.
Table 1. Recommended Operating Conditions
Symbol
Parameter
Conditions
VDD3
VDD5
VI
VO
TEMP
DC Supply Voltage
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Operating Free Air
Temperature Range
Core and Standard I/Os
5V Interface I/Os
Industrial
Min Typ Max Unit
3.0 3.3 3.6
V
4.5 5.0 5.5
V
0
VDD
V
0
VDD
V
-55 +85 °C
The Atmel cell libraries and megacell compilers have been designed in order to be
compatible with each other. Simulation representations exist for three types of operat-
ing conditions. They correspond to three characterization conditions defined as
follows:
• MIN conditions:
TJ = -55°C
VDD (cell) = 3.60V
Process = fast (industrial best case)
• TYP conditions:
TJ = +25°C
VDD (cell) = 3.30V
Process = typ (industrial typical case)
• MAX conditions:
TJ = +100°C
VDD (cell) = 3.00V
Process = slow (industrial worst case)
Delays to tristate are defined as delay to turn off (VGS < VT) of the driving devices.
Output pad drain current corresponds to the output current of the pad when the output
voltage is VOL or VOH. The output resistor of the pad and the voltage drop due to
access resistors (in and out of the die) are taken into account. In order to have accu-
rate timing estimates, all characterization has been run on electrical netlists extracted
from the layout database.
Cell-based ASIC
ATC35
Summary
Rev. 1063CS–CBIC–01/03
1
Free Datasheet http://www.datasheet4u.net/




ATC35 pdf, 반도체, 판매, 대치품
Input/Output Pad Cell
Libraries
IOlib and IO35lib
The Atmel Input/Output Cell Library, IOlib, contains a comprehensive list of input, out-
put, bidirectional and tristate cells. The ATC35 (AT56K) (3.3V) cell library includes a
special set of I/O cells, IO35lib, for interfacing with external 5V devices.
Voltage Levels
The IOlib library is made up exclusively of low-voltage chip interface circuits powered by
a voltage in the range of 3.0V to 3.6V. The library is compatible with the SClib 3-volt
standard cells library.
Power and Ground Pads
Designers are strongly encouraged to provide three kinds of power pairs for the IOlib
library. These are “AC”, “DC” and core power pairs. AC power is used by the I/O to
switch its output from one state to the other. This switching generates noise in the AC
power buses on the chip. DC power is used by the I/O to maintain its output in a steady
state. The best noise performance is achieved when the DC power buses on the chip
are free of noise; designers are encouraged to use separate power pairs for AC and DC
power to prevent most of the noise in the AC power buses from reaching the DC power
buses. The same power pairs can be used to supply both DC power to the I/Os and
power to the core without affecting noise performance.
Table 6. VSS Power Pad Combinations
Core
Switching I/O
Quiet I/O
Vssi
VssAC
VssDC
••
••
•••
Library Cell
Name
PV0I
PV0A
PV0D
PV0E
PV0B
PV0F
Signal Name
VSS
VSS
VSS
VSS
VSS
VSS
Table 7. VDD Power Pad Combinations
Core
Switching I/O
Quiet I/O
Vddi
VddAC
VddDC
••
••
•••
Library Cell
Name
PVDI
PVDA
PVDD
PVDE
PVDB
PVDF
Signal Name
VDD
VDD
VDD
VDD
VDD
VDD
4 ATC35 Summary
1063CS–CBIC–01/03
Free Datasheet http://www.datasheet4u.net/

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ATC35 전자부품, 판매, 대치품
ATC35 Summary
Oscillator Cell
Library Osclib
Crystal Oscillators and
Power on Reset
Phase Locked Loops
The Atmel CBIC oscillator library provides stable clock sources. This library makes the
following cells available:
The Atmel two-pad oscillators are designed with the Pierce three-point oscillator struc-
ture. For operation with most standard crystals, no external capacitors are needed. It
may be necessary to add external capacitors on xin and xout to ground in special cases.
Clock output is low at off state (onosc = 0).
The oscillators provide a test mode (test = 1 and onosc = 1), clock = not (xin).
The Atmel Power-on-reset cell is dedicated to reset the internal circuit at power up and
when the battery falls low.
Table 14 gives available oscillator and POR cells.
Table 14. Oscillator and POR Cells
Cell Name
Description
osc33k
Low-power, optimized for 32.786 kHz crystal
osc16m
16 MHz crystal oscillator
osc27m
27 MHz crystal oscillator
GNDYPOR
Ground pad for periphery with power on reset. Static and
dynamic reset with internal hysteresis.
The Atmel PLLs are systems designed for synchronizing an internal chip clock with an
input reference clock or multiplicating an input reference clock. Table 15 gives available
phase locked loop cells.
Table 15. Phase Locked Loop Cells
Cell Name
Description
pll020m1
5 - 20 MHz single-pad phase locked loop
pll080m1
20 - 80 MHz single-pad phase locked loop
pll220m1
80 - 220 MHz single-pad phase locked loop
Basic Analog Cell
Library AnaLib
The Atmel CBIC Analog Library makes the following parts available:
• Multiplexer modules
– Multiplexers to minimize cross-talk (for use with high-impedance nodes).
– Multiplexers to minimize ON resistance.
• Analog input and output cells
• Analog power and ground cells
General-purpose
Analog Library GPlib
The General-purpose Analog Cell Library is composed of cells performing various ana-
log functions.
Currently available are regulators, power management cells, op amps, comparators,
low-speed ADCs and DACs.
1063CS–CBIC–01/03
7
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ATC35

Cell-based ASIC

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