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PDF AR8327 Data sheet ( Hoja de datos )
| Número de pieza | AR8327 | |
| Descripción | Seven-port Gigabit Ethernet Switch | |
| Fabricantes | Atheros | |
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 1. - Seven-port Gigabit Ethernet Switch  Hay una vista previa y un enlace de descarga de AR8327 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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Data Sheet
June 2011
Version 1.0
AR8327/AR8327N Seven-port Gigabit Ethernet Switch
General Description
The AR8327 is a highly integrated seven-port
Gigabit Ethernet switch with non-blocking
switch fabric, a high-performance lookup unit
with 2048 MAC address, and a four-traffic class
Quality of Service (QoS) engine. The AR8327
has the flexibility to support various networking
applications. The AR8327 is designed for cost-
sensitive switch applications in wireless AP
routers, home gateways, and xDSL/cable
modem platforms.
The AR8327 integrates all the functions of a
high-speed Switch system, including packet
buffer, PHY transceivers, media access
controllers, address management, and a non-
blocking switch fabric into a single 0.11 um
CMOS device. It complies with 10BASE-Te,
100BASE-Tx & 1000BASE-T specifications,
including the MAC control, pause frame, and
auto-negotiation subsections, providing
compatibility with all industry-standard
Ethernet, Fast Ethernet & Gigabit Ethernet
networks.
The AR8327 device contains five full-duplex
10BASE-Te/100BASE-TX/1000BASE-T
transceivers and 10BASE-Te/100BASE-TX can
run at half duplex, each of which performs all
of the physical layer interface functions for
10BASE-Te Ethernet on Category 5 unshielded
twisted-pair (UTP) cable and 100BASE-TX
Fast/Gigabit Ethernet on Category 5 UTP
cable. The remaining 2 ports feature a standard
GMII/RGMII/MII/Serdes interface to allow
connection to a host CPU in PON/xDSL/
Cable/Wifi/Fiber routers. The media access
controllers on the AR8327 also support Jumbo
Frames which are typically used for high-
performance connections to servers because
they offer a smaller percentage of overhead on
the link for more efficiency.
MDC/MDIO or EEPROM interfaces provide
easy programming of the on-chip 802.1p QoS
and/or DiffServ/TOS. This allows switch
traffic to be given different classes of priority or
service - for example, voice traffic for IP phone
applications, video traffic for multimedia
applications, or data traffic for e-mail. Up to 4K
Virtual LANs (VLANs) can be set up via the
MDC/MDIO port for separation of different
users or groups on the network. ACL features
can reduce CPU effort for VLAN/Q.O.S/
DSCP/Forward mapping & remapping based
on layer1 to Layer4 information. 16 PPPoE
header add/removal can increase Video
quality and offload the CPU. Hardware IGMP
V1/V2/V3 is an innovation for IPTV service.
Green Power can increase energy efficiency for
no link or idle states.
The AR8327N chip supports hardware NAT
(Network Address Translation) to offload the
CPU and achieve the full wire speed when
doing NAT. The AR8327/AR8327N supports
the following modes of NAT.
1. Basic NAT: This involves IP address
translation only, not port mapping.
2. Network Address Port Translation (NAPT):
This involves the translation of both IP
addresses and port numbers. For the NAPT
mode, the AR8327/AR8327N can support
Full cone NAT, Restricted cone NAT, Port-
Restricted cone NAT and Symmetric NAT.
e AR8327/AR8327N supports the following
configurations
n 5*10/100/1000Base-T + GMII/RGMII/MII
+ 1* Serdes
n 5* 10/100/1000Base-T + 2*RGMII/MII
n 4* 10/100/1000Base-T + 1*RGMII/MII + 1*
Single RGMII PHY
AR8327/AR8327N Features
The AR8327 chip family includes a 7-port MAC
structure to support the following family of
switch chips:
n Supports 802.3az Power Management
n The AR8327N chip includes the Hardware
NAT (Network Address Translation)
function
© 2010 by Atheros Communications, Inc. All rights reserved. Atheros®, Atheros Driven®, Align®, Atheros XR®, Driving the Wireless Future®, Intellon®, No New Wires®,
Orion®, PLC4Trucks®, Powerpacket®, Spread Spectrum Carrier®, SSC®, ROCm®, Super A/G®, Super G®, Super N®, The Air is Cleaner at 5-GHz®, Total 802.11®, U-
Nav®, Wake on Wireless®, Wireless Future. Unleashed Now.®, and XSPAN®, are registered by Atheros Communications, Inc. Atheros SST™, Signal-Sustain Technology™,
Ethos™, Install N Go™, IQUE™, ROCm™, amp™, Simpli-Fi™, There is Here™, U-Map™, U-Tag™, and 5-UP™ are trademarks of Atheros Communications, Inc. The
Atheros logo is a registered trademark of Atheros Communications, Inc. All other trademarks are the property of their respective holders. Subject to change without notice.
COMPANY CONFIDENTIAL
•1
1 page  
3.5.17 PORT4_VLAN_CTRL1 ............ 119
3.5.18 PORT5_VLAN_CTRL0 ............ 119
3.5.19 PORT5_VLAN_CTRL1 ............ 120
3.5.20 PORT6_VLAN_CTRL0 ............ 121
3.5.21 PORT6_VLAN_CTRL1 ............ 122
3.5.22 IPv6 Private Base Address Register
0 ................................................... 122
3.5.23 IPv6 Private Base Address Register
1 ................................................... 123
3.5.24 IPv6 Private Base Address Register
2 ................................................... 123
3.6 LOOKUP REGISTER (Address Range:
0x0600 ~ 0x0708) 124
3.6.1 ATU_DATA0 ............................. 125
3.6.2 ATU_DATA1 ............................. 125
3.6.3 ATU_DATA2 ............................. 126
3.6.4 ATU_FUNC_REG ..................... 126
3.6.5 VTU_FUNC_REG0 ................... 128
3.6.6 VTU_FUNC_REG1 ................... 129
3.6.7 ARL_CTRL ................................ 130
3.6.8 GLOBAL_FW_CTRL0 .............. 131
3.6.9 GLOBAL_FW_CTRL1 .............. 133
3.6.10 GOL_LEARN_LIMIT ............... 133
3.6.11 TOS_PRI_MAP_REG0 ............. 134
3.6.12 TOS_PRI_MAP_REG1 ............. 135
3.6.13 TOS_PRI_MAP_REG2 ............. 135
3.6.14 TOS_PRI_MAP_REG3 ............. 136
3.6.15 TOS_PRI_MAP_REG4 ............. 136
3.6.16 TOS_PRI_MAP_REG5 ............. 137
3.6.17 TOS_PRI_MAP_REG6 ............. 137
3.6.18 TOS_PRI_MAP_REG7 ............. 138
3.6.19 VLAN_PRI_MAP_REG0 ......... 138
3.6.20 LOOP_CHECK_RESULT ........ 139
3.6.21 PORT0_LOOKUP_CTRL ......... 139
3.6.22 PORT0_PRI_CTRL .................... 142
3.6.23 PORT0_LEARN_LIMIT ........... 143
3.6.24 PORT1_LOOKUP_CTRL ......... 144
3.6.25 PORT1_PRI_CTRL Address 0x0670
147
3.6.26 PORT1_LEARN_LIMIT ........... 148
3.6.27 PORT2_LOOKUP_CTRL ......... 149
3.6.28 PORT2_PRI_CTRL .................... 151
3.6.29 PORT2_LEARN_LIMIT ........... 152
3.6.30 PORT3_LOOKUP_CTRL ......... 153
3.6.31 PORT3_PRI_CTRL .................... 156
3.6.32 PORT3_LEARN_LIMIT ........... 157
3.6.33 PORT4_LOOKUP_CTRL ......... 158
3.6.34 PORT4_PRI_CTRL ................... 160
3.6.35 PORT4_LEARN_LIMIT ........... 161
3.6.36 PORT5_LOOKUP_CTRL ......... 162
3.6.37 PORT5_PRI_CTRL ................... 165
3.6.38 PORT5_LEARN_LIMIT ........... 166
3.6.39 PORT6_LOOKUP_CTRL ......... 167
3.6.40 PORT6_PRI_CTRL ................... 170
3.6.41 PORT6_LEARN_LIMIT ........... 171
3.6.42 GOL_TRUNK_CTRL0 ............. 172
3.6.43 GOL_TRUNK_CTRL1 ............. 173
3.6.44 GOL_TRUNK_CTRL2 ............. 174
3.7 QM REGISTER(BASE ADDR:0x0800) 175
3.7.1 GLOBAL_FLOW_THD ........... 180
3.7.2 QM_CTRL_REG ....................... 180
3.7.3 WAN_QUEUE_MAP_REG ..... 182
3.7.4 LAN_QUEUE_MAP_REG ...... 183
3.7.5 PORT0_WRR_CTRL ................ 184
3.7.6 PORT1_WRR_CTRL ................ 185
3.7.7 PORT2_WRR_CTRL ................ 185
3.7.8 PORT3_WRR_CTRL ................ 186
3.7.9 PORT4_WRR_CTRL ................ 187
3.7.10 PORT5_WRR_CTRL ................ 188
3.7.11 PORT6_WRR_CTRL ................ 189
3.7.12 PORT0_EG_RATE_CTRL0 ...... 190
3.7.13 PORT0_EG_RATE_CTRL1 ...... 191
3.7.14 PORT0_EG_RATE_CTRL2 ...... 192
3.7.15 PORT0_EG_RATE_CTRL3 ...... 192
3.7.16 PORT0_EG_RATE_CTRL4 ...... 193
3.7.17 PORT0_EG_RATE_CTRL5 ...... 194
3.7.18 PORT0_EG_RATE_CTRL6 ...... 194
3.7.19 PORT0_EG_RATE_CTRL7 ...... 198
3.7.20 PORT1_EG_RATE_CTRL0 ...... 202
3.7.21 PORT1_EG_RATE_CTRL0 ...... 203
3.7.22 PORT1_EG_RATE_CTRL3 ...... 203
3.7.23 PORT1_EG_RATE_CTRL0 ...... 204
3.7.24 PORT1_EG_RATE_CTRL6 ...... 205
3.7.25 PORT1_EG_RATE_CTRL7 ...... 206
3.7.26 PORT2_EG_RATE_CTRL0 ...... 207
3.7.27 PORT2_EG_RATE_CTRL0 ...... 208
3.7.28 PORT2_EG_RATE_CTRL0 ...... 208
3.7.29 PORT2_EG_RATE_CTRL0 ...... 209
3.7.30 PORT2_EG_RATE_CTRL0 ...... 210
Atheros Communications, Inc.
COMPANY CONFIDENTIAL
AR8327/AR8327N Seven-port Gigabit Ethernet Switch • 5
June 2011 • 5
5 Page 
Revision History
Table 0-1. AR8161-A Revision History
Date
2011/2/24
2011/6/10
Revision Details
First draft
General
n Typo and grammar corrections
n Reference corrections
Pin Description
n Update drawing to re-organize inner(B) and outer (A) pins
n Table 1-1: change A54 pin type to I/O, PU
Function Descriptions
n Table 2-34 and 2-35: change PRIVATE_IP_ADDR_MODE to
PRIVATE_IP_BASE_SEL
n 2.7.2 Action Definition: add description
n 2.21 Memory Map: update memory map
Registers
n 3.2.2 PORT0 PAD MODE CTRL, update bit[18] bit[19] definitions
n 3.2.3 PORT5 PAD MODE CTRL (0x0008): add description for bit[10]
n 3.2.5 PWS_REG (0x0010): update bit definitions
n 3.5.22 to 3.5.24 IPv6 Private Base Address Register 0-2: new registers
n 3.8.12 to 3.8.14 Router Default VID Register 0-2: new registers
n 3.8.16 Router Egress VLAN Mode (0x0C80): new register
n 3.10.24 Debug Port 2 (0xIE): change decimal address to “0d30“
n 3.10.25 Debug Register—Analog Test Control (0x00): new register
n 3.10.26 Debug Register—System Mode Control (0x03): new register
n 3.10.28 Debug Register—Hib Control and Auto Negotiation Test Register
(0x0B): new register
n 3.10.30 Debug Register—Green Feature Configure Register (0x3D): new
register
n 3.13 MMD7—Auto-negotiation Register: update bit definitions
n 3.13.3 to 3.13.7: update decimal address
n 4.6 Typical Power Consumption Parameters: update “two ports active” and
“three ports active“ values
Package Dimensions
n Update package illustration
Ordering
n Update ordering method for tape&reel and tray
Top Side Marking
n Add package top marking illustration
Revision
0.31
1
Atheros Communications, Inc.
Switch • 11
AR8327/AR8327N Seven-port Gigabit Ethernet
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AR8327.PDF ] | |
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