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부품번호 HGTP5N120 기능
기능 21A/ 1200V/ NPT Series N-Channel IGBTs with Anti-Parallel Hyperfast Diodes
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HGTP5N120 데이터시트, 핀배열, 회로
Data Sheet
HGTG5N120BND, HGTP5N120BND
May 2003
21A, 1200V, NPT Series N-Channel IGBTs
with Anti-Parallel Hyperfast Diodes
The HGTG5N120BND and HGTP5N120BND are Non-
Punch Through (NPT) IGBT designs. They are new
members of the MOS gated high voltage switching IGBT
family. IGBTs combine the best features of MOSFETs and
bipolar transistors. This device has the high input impedance
of a MOSFET and the low on-state conduction loss of a
bipolar transistor. The IGBT used is the development type
TA49308. The Diode used is the development type TA49058
(Part number RHRD6120).
The IGBT is ideal for many high voltage switching
applications operating at moderate frequencies where low
conduction losses are essential, such as: AC and DC motor
controls, power supplies and drivers for solenoids, relays
and contactors.
Formerly Developmental Type TA49306.
Ordering Information
PART NUMBER
PACKAGE
BRAND
HGTG5N120BND
HGTP5N120BND
TO-247
TO-220AB
5N120BND
5N120BND
NOTE: When ordering, use the entire part number. i.e.,
HGTG5N120BND.
Symbol
C
G
Features
• 21A, 1200V, TC = 25oC
• 1200V Switching SOA Capability
• Typical Fall Time . . . . . . . . . . . . . . . . 175ns at TJ = 150oC
• Short Circuit Rating
• Low Conduction Loss
Thermal Impedance SPICE Model
Temperature Compensating SABER™ Model
www.fairchildsemi.com
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Packaging
JEDEC STYLE TO-247
COLLECTOR
(FLANGE)
E
C
G
JEDEC TO-220AB (ALTERNATE VERSION)
COLLECTOR
(FLANGE)
E
C
G
E
FAIRCHILD SEMICONDUCTOR IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS
4,364,073
4,417,385
4,430,792
4,443,931
4,466,176
4,516,143
4,532,534
4,587,713
4,598,461
4,682,195
4,803,533
4,605,948
4,684,413
4,809,045
4,620,211
4,694,313
4,809,047
4,631,564
4,717,679
4,810,665
4,639,754
4,743,952
4,823,176
4,639,762
4,783,690
4,837,606
4,641,162
4,794,432
4,860,080
4,644,637
4,801,986
4,883,767
4,888,627
4,890,143
4,901,127
4,904,609
4,933,740
4,963,951
4,969,027
©2003 Fairchild Semiconductor Corporation
HGTG5N120BND, HGTP5N120BND, Rev. B1




HGTP5N120 pdf, 반도체, 판매, 대치품
HGTG5N120BND, HGTP5N120BND
Typical Performance Curves Unless Otherwise Specified (Continued)
200
TJ = 150oC, RG = 25, L = 5mH, VCE = 960V
TC = 75oC, VGE = 15V TC VGE
IDEAL DIODE 75oC 15V
100 75oC 12V
50
fMAX1 = 0.05 / (td(OFF)I + td(ON)I)
fMAX2 = (PD - PC) / (EON + EOFF)
10 PC = CONDUCTION DISSIPATION
(DUTY FACTOR = 50%)
RØJC = 0.75oC/W, SEE NOTES
TC VGE
110oC 15V
110oC 12V
2 4 6 8 10
ICE, COLLECTOR TO EMITTER CURRENT (A)
FIGURE 3. OPERATING FREQUENCY vs COLLECTOR TO
EMITTER CURRENT
30
DUTY CYCLE <0.5%, VGE = 12V
PULSE DURATION = 250µs
25
TC = -55oC
20
TC = 25oC
15 TC = 150oC
10
5
0
0 2 4 6 8 10
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE
40
VCE = 840V, RG = 25, TJ = 125oC
35
ISC
30
80
70
60
25 50
20 40
tSC
15 30
10
10
11 12 13 14
VGE, GATE TO EMITTER VOLTAGE (V)
20
15
FIGURE 4. SHORT CIRCUIT WITHSTAND TIME
30
25
TC = -55oC
20
TC = 25oC
TC = 150oC
15
10
5
DUTY CYCLE <0.5%, VGE = 15V
PULSE DURATION = 250µs
0
0 2 4 6 8 10
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE
3000
RG = 25, L = 5mH, VCE = 960V
2500
2000
TJ = 150oC, VGE = 12V, VGE = 15V
1500
1000
500
0
2
TJ = 25oC, VGE = 12V, VGE = 15V
3456789
ICE, COLLECTOR TO EMITTER CURRENT (A)
10
FIGURE 7. TURN-ON ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
900
RG = 25, L = 5mH, VCE = 960V
800
700 TJ = 150oC, VGE = 12V OR 15V
600
500
400
TJ = 25oC, VGE = 12V OR 15V
300
200
2 3 4 5 6 7 8 9 10
ICE, COLLECTOR TO EMITTER CURRENT (A)
FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
©2003 Fairchild Semiconductor Corporation
HGTG5N120BND, HGTP5N120BND, Rev. B1

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HGTP5N120 전자부품, 판매, 대치품
HGTG5N120BND, HGTP5N120BND
Test Circuit and Waveforms
HGTG5N120BND
RG = 25
L = 2mH
+
VDD = 960V
-
FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT
Handling Precautions for IGBTs
Insulated Gate Bipolar Transistors are susceptible to gate-
insulation damage by the electrostatic discharge of energy
through the devices. When handling these devices, care
should be exercised to assure that the static charge built in the
handler’s body capacitance is not discharged through the
device. With proper handling and application procedures,
however, IGBTs are currently being extensively used in
production by numerous equipment manufacturers in military,
industrial and consumer applications, with virtually no damage
problems due to electrostatic discharge. IGBTs can be
handled safely if the following basic precautions are taken:
1. Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such as
“ECCOSORBD™ LD26” or equivalent.
2. When devices are removed by hand from their carriers, the
hand being used should be grounded by any suitable
means - for example, with a metallic wristband.
3. Tips of soldering irons should be grounded.
4. Devices should never be inserted into or removed from
circuits with power on.
5. Gate Voltage Rating - Never exceed the gate-voltage
rating of VGEM. Exceeding the rated VGE can result in
permanent damage to the oxide layer in the gate region.
6. Gate Termination - The gates of these devices are
essentially capacitors. Circuits that leave the gate open-
circuited or floating should be avoided. These conditions
can result in turn-on of the device due to voltage buildup on
the input capacitor due to leakage currents or pickup.
7. Gate Protection - These devices do not have an internal
monolithic Zener diode from gate to emitter. If gate
protection is required an external Zener is recommended.
90%
VGE
VCE
EOFF
10%
EON
90%
ICE 10%
td(OFF)I
tfI
trI
td(ON)I
FIGURE 21. SWITCHING TEST WAVEFORMS
Operating Frequency Information
Operating frequency information for a typical device (Figure 3)
is presented as a guide for estimating device performance for
a specific application. Other typical frequency vs collector
current (ICE) plots are possible using the information shown
for a typical unit in Figures 5, 6, 7, 8, 9 and 11. The operating
frequency plot (Figure 3) of a typical device shows fMAX1 or
fMAX2; whichever is smaller at each point. The information is
based on measurements of a typical device and is bounded
by the maximum rated junction temperature.
fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I).
Deadtime (the denominator) has been arbitrarily held to 10%
of the on-state time for a 50% duty factor. Other definitions are
possible. td(OFF)I and td(ON)I are defined in Figure 19. Device
turn-off delay can establish an additional frequency limiting
condition for an application other than TJM. td(OFF)I is
important when controlling output ripple under a lightly loaded
condition.
fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON). The
allowable dissipation (PD) is defined by PD = (TJM - TC)/RθJC.
The sum of device switching and conduction losses must
not exceed PD. A 50% duty factor was used (Figure 3) and
the conduction losses (PC) are approximated by
PC = (VCE x ICE)/2.
EON and EOFF are defined in the switching waveforms shown
in Figure 21. EON is the integral of the instantaneous power
loss (ICE x VCE) during turn-on and EOFF is the integral of the
instantaneous power loss (ICE x VCE) during turn-off. All tail
losses are included in the calculation for EOFF; i.e., the
collector current equals zero (ICE = 0).
©2003 Fairchild Semiconductor Corporation
HGTG5N120BND, HGTP5N120BND, Rev. B1

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