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PDF MTV416M Data sheet ( Hoja de datos )
| Número de pieza | MTV416M | |
| Descripción | 8051 Embedded Micro-Controller | |
| Fabricantes | Myson | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MTV416M (archivo pdf) en la parte inferior de esta página. Total 37 Páginas | ||
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MTV416M
Preliminary
8051 Embedded Micro-Controller with 128K Flash ROM
GENERAL DESCRIPTION
The MTV416M micro-controller is an 8051 CPU core
embedded device targeted for LCD Monitor or LCD
TV application. It includes an 8051 CPU core, a
128K-byte internal program Flash-ROM, a 768-byte
SRAM, 4 channels of PWM DAC, 4 channels of 6-bit
ADC, and a built-in sync-processor. It also includes
two IIC Slave B ports, supporting VESA DDC/CI for
both D-sub and DVI interfaces, and a Boot-Code-
Free ISP (In System Programming).
FEATURES
• 8051 core, 24MHz operating frequency
• + 3.3V power supply
• 768-bytes RAM; 128K-byte program Flash-ROM
- 256 bytes Internal RAM
- 256 bytes Auxiliary RAM
- 128 x 2 bytes DDC RAM
• 4 channels of PWM DAC
- Sink current up to 10 mA (DA0 ~ DA3)
- Programmable PWM output frequency (100 Hz
~ 100KHz)
- 14-bit PWM out for VCT application (DA2 and
DA3)
• Maximum 39 I/O pins
• Maximum 10 channels of +3.3V/+5.0V tolerant I/O
- Hsync, Vsync, HSCL1, HSDA1, HSCL2,
HSDA2, and General I/O x 4
BLOCK DIAGRAM
• SYNC processor for composite separation /
insertion, H/V polarity/frequency check and
polarity adjustment
- Programmable hysteretic window for built-in
Schmitt Trigger
• Built-in analog filter for Hsync, Vsync, and IIC
input pins
• Support SOG (Sync On Green) input
• Two clock output ports to drive other devices
- Programmable output driving current for EMI
repression (CLKO1)
• Built-in dual DDC RAMs, H/W auto transfer
DDC1/DDC2x data for both D-sub and DVI
interfaces
• Built-in two IIC Slave B ports, supporting VESA
DDC1/2B/2Bi/2B+/CI standards
• Single master IIC interface for peripheral device
communication
• Maximum 4-channel 6-bit A/D converter with Flag
indication
- Conversion time: 16 uS
- Input voltage level: 0 ~ +VDD
• ISP (In System Programming)
- Support H/W ISP, no Boot Code required
• Programmable Watch Dog Timer
• Flash-ROM program code protection
• 44-pin PLCC or QFP package
• Green packages available
• Main application fields: LCD Monitor, LCD TV
P1.0-7
P0.0-7
P3.0-4
P2.0-3
RD
8051
CORE
WR
ALE
INT1
RST
X1
X2
CKO1-2
P7.0-5
P6.0-7 AUX
P5.0-7 I/O
P4.0-3
P0.0-7
P2.0-3
RD XFR
WR
ALE
INT1
ADC
AD0-3
PWM
DA0-3
EXTERNAL
Counter/Timer 2
AUXRAM &
DDCRAM1 &
DDCRAM2
H/VSYNC
CONTROL
HSYN
VSYNC
SOGI
HBLANK
VBLANK
HCLAM
ISCL
DDC & IIC
ISDA
HSCL1
INTERFACE
HSDA1
HSCL2
HSDA2
**This datasheet is the confidential information of MYSON CENTURY, INC. and is subject to various privileges
against unauthorized disclosure. Recipient shall not disclose this confidential information to any other person,
nor shall one use the confidential information for the purpose of competing with MYSON CENTURY, INC.
Myson Century, Inc.
No. 2, Industry East Rd. III,
Science-Based Industrial Park, Hsin-Chu, Taiwan
Tel: 886-3-578-4866 Fax: 886-3-5784349
Confidential
Rev. 0.9 August 2004
Page 1 of 37
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1 page  
PIN CONFIGURATION
MTV416M
Preliminary
A “CMOS output pin” (Figure 1-2) means it can sink and drive at least 4mA current. It is not recommended to
use such pin as input function.
An “open drain pin” (Figure 1-3) means it can sink at least 4mA current. It can be used as input or output
function and needs an external pull up resistor.
An “8051 standard pin” (Figure 1-1) is a pseudo open drain pin. It can sink at least 4mA current when output is
at low level, and drives at least 4mA current for 160nS when output transits from low to high, then keeps driving
at 100uA to maintain the pin at high level. It can be used as input or output function. It needs an external pull up
resistor when driving heavy load device.
There is an internal-pull down resistance on each CMOS PAD and an internal pull-down resistance on each
input PAD. It is recommended to add a pull high resistance on each open drain pin.
Output
Data
4mA
10uA
120uA
2 OSC
period
delay
4mA
Input
Data
Figure 1-1 8051 Standard Pin
Pin
Output
Data
4mA
Pin
4mA
Figure 1-2 CMOS Output Pin
No Current
Input
Data
Output
Data
Pin
4mA
Figure 1-3 Open Drain Pin
Page 5 of 37
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5 Page 
MTV416M
Preliminary
REG NAME ADDRESS bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
P5B0
F30h(w)
P50
P5B1
F31h(w)
P51
P5B2
F32h(w)
P52
P5B3
F33h(w)
P53
P5B4
F34h(w)
P54
P5B5
F35h(w)
P55
P5B6
F36h(w)
P56
P5B7
F37h(w)
P57
P6B0
F38h(w)
P60
P6B1
F39h(w)
P61
P6B2
F3Ah(w)
P62
P6B3
F3Bh(w)
P63
P6B4
F3Ch(w)
P64
P6B5
F3Dh(w)
P65
P6B6
F3Eh(w)
P66
P6B7
F3Fh(w)
P67
P4B0
F58h(w)
P40
P4B1
F59h(w)
P41
P4B2
F5Ah(w)
P42
P4B3
P7B0
P7B1
P7B2
P7B3
P7B4
P7B5
F5Bh(w)
F70h(w)
F71h(w)
F72h(w)
F73h(w)
F74h(w)
F75h(w)
P43
P70
P71
P72
P73
P74
P75
PORT 5
PORT 6
PORT 4
PORT 7
F80h(r/w) P57 P56 P55 P54 P53 P52 P51 P50
F81h(r/w) P67 P66 P65 P64 P63 P62 P61 P60
F82h(r/w)
P43 P42 P41 P40
F83h(r/w)
P75 P74 P73 P72 P71 P70
Note: MTV416M supports bit/byte write and byte read functions on Port4, Port5, Port6, and Port7.
P4B0 – P4B3 (w) :
P5B0 – P5B7 (w) :
P6B0 – P6B7 (w) :
P7B0 – P7B7 (w) :
Port 4 bit access data output.
Port 5 bit access data output
Port 6 bit access data output.
Port 7 bit access data output.
PORT 4 (r/w) : Port 4 4-bit input/output data.
PORT 5 (r/w) : Port 5 data input/output value.
PORT 6 (r/w) : Port 6 data input/output value.
PORT 7 (r/w) : Port 7 6-bit input/output value.
Page 11 of 37
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11 Page | ||
| Páginas | Total 37 Páginas | |
| PDF Descargar | [ Datasheet MTV416M.PDF ] | |
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