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HI-539 데이터시트 PDF




Intersil Corporation에서 제조한 전자 부품 HI-539은 전자 산업 및 응용 분야에서
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부품번호 HI-539 기능
기능 Precision/ 4-Channel/ Low-Level/ Differential Multiplexer
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HI-539 데이터시트, 핀배열, 회로
Data Sheet
HI-539
July 1999 File Number 3149.2
Precision, 4-Channel, Low-Level,
Differential Multiplexer
The Intersil HI-539 is a monolithic, 4-Channel, differential
multiplexer. Two digital inputs are provided for channel
selection, plus an Enable input to disconnect all channels.
Performance is guaranteed for each channel over the
voltage range ±10V, but is optimized for low level differential
signals. Leakage current, for example, which varies slightly
with input voltage, has its distribution centered at zero input
volts.
In most monolithic multiplexers, the net differential offset due
to thermal effects becomes significant for low level signals.
This problem is minimized in the HI-539 by symmetrical
placement of critical circuitry with respect to the few heat
producing devices.
Supply voltages are ±15V and power consumption is only
2.5mW.
Ordering Information
PART NUMBER
HI1-0539-5
HI1-0539-8
TEMP.
RANGE (oC)
PACKAGE
0 to 75 16 Ld CERDIP
-55 to 125 16 Ld CERDIP
HI3-0539-5
HI4P0539-5
0 to 75
0 to 75
16 Ld PDIP
20 Ld PLCC
PKG.
NO.
F16.3
F16.3
E16.3
N20.35
Pinouts
HI-539
(CERDIP, PDIP)
TOP VIEW
A0 1
EN 2
V- 3
IN 1A 4
IN 2A 5
IN 3A 6
IN 4A 7
OUT A 8
16 A1
15 GND
14 V+
13 IN 1B
12 IN 2B
11 IN 3B
10 IN 4B
9 OUT B
Features
• Differential Performance, Typical:
- Low rON, 125oC . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5
- Low ID(ON), 125oC . . . . . . . . . . . . . . . . . . . . . . . 0.6nA
- Low Charge Injection . . . . . . . . . . . . . . . . . . . . 0.1pC
- Low Crosstalk . . . . . . . . . . . . . . . . . . . . . . . . . . . -124dB
• Settling Time, ±0.01% . . . . . . . . . . . . . . . . . . . . . . . 900ns
• Wide Supply Range . . . . . . . . . . . . . . . . . . . ±5V to ±18V
• Break-Before-Make Switching
• No Latch-Up
Applications
• Low Level Data Acquisition
• Precision Instrumentation
• Test Systems
TRUTH TABLE
ON CHANNEL TO
EN
A1
A0
OUT A
OUT B
L
X
X
None
None
H L L 1A 1B
H L H 2A 2B
H H L 3A 3B
H H H 4A 4B
HI-539
(PLCC)
TOP VIEW
3 2 1 20 19
V- 4
IN 1A 5
NC 6
IN 2A 7
IN 3A 8
18 V+
17 IN 1B
16 NC
15 IN 2B
14 IN 3B
9 10 11 12 13
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999




HI-539 pdf, 반도체, 판매, 대치품
HI-539
Electrical Specifications Supplies = ±15V, VEN = 4V, VAH (Logic Level High) = 4V, VAL (Logic Level Low) = 0.8V,
Unless Otherwise Specified (Continued)
PARAMETER
TEST
TEMP
-8
-5
CONDITIONS (oC) MIN TYP MAX MIN TYP MAX UNITS
Current, l-
25
- 0.001 -
-
0.001
-
mA
Full -
- 1.0 -
- 1.0 mA
Supply Voltage Range
Full ±5 ±15 ±18 ±5 ±15 ±18 V
NOTES:
2. See Figures 2B, 2C, 2D. The condition ±10V means:
lS(OFF) and ID(OFF):
(VS = +10V, VD = -10V), then
(VS = -10V, VD = +10V)
ID(ON): (+10V, then -10V)
3. VOS (Exclusive of thermocouple effects) = rON ID(ON) + ID(ON) rON. See Applications section for discussion of additional VOS error.
4. VlN = 1kHz, 15VP-P on all but the selected channel. See Figure 7.
5. Calculated from typical Single-Ended Crosstalk performance.
Test Circuits and Waveforms Unless Otherwise Specified TA = 25oC, V+ = +15V, V- = -15V, VAH = 4V and VAL = 0.8V
100µA
VIN = 0V
800
V2
IN OUT
VIN
HI-539
V2
rON = 100µA
FIGURE 1A. TEST CIRCUIT
900
125oC
800
700 25oC
600
500 -55oC
400
-12 -10 -8 -6 -4 -2 0 2
46
8 10 12
ANALOG INPUT (V)
700
600
500
-50
-25
0 25 50 75
TEMPERATURE (oC)
100 125
FIGURE 1B. ON RESISTANCE vs TEMPERATURE
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
5
VIN = 0V
7 9 11 13 15 17
SUPPLY VOLTAGE (±V)
FIGURE 1C. ON RESISTANCE vs ANALOG INPUT VOLTAGE
FIGURE 1D. ON RESISTANCE vs SUPPLY VOLTAGE
FIGURE 1. ON RESISTANCE
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HI-539 전자부품, 판매, 대치품
HI-539
Test Circuits and Waveforms Unless Otherwise Specified TA = 25oC, V+ = +15V, V- = -15V, VAH = 4V and VAL = 0.8V (Continued)
VA INPUT
2V/DIV.
S1 ON
S4 ON
OUTPUT
1V/DIV.
100ns/DIV.
FIGURE 5C. WAVEFORMS
FIGURE 5. BREAK-BEFORE-MAKE DELAY
+15V
50%
VAH = 4V
90%
tON(EN)
50% ENABLE DRIVE (VA)
0V
OUTPUT
10%
0V
tOFF(EN)
FIGURE 6A. MEASUREMENT POINTS
V+
HI-539
IN 1A
+10V
A1
IN 2A THRU
IN 4A
A0
EN OUT A
VA
50 GND V-
700
Similar connection for side “B”
-15V
FIGURE 6B. TEST CIRCUIT
VOUT
12.5pF
ENABLE
DRIVE
2V/DIV.
DISABLED
ENABLED
(S1 ON)
OUTPUT
2V/DIV.
100ns/DIV.
FIGURE 6C. WAVEFORMS
FIGURE 6. ENABLE DELAYS
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부품번호상세설명 및 기능제조사
HI-539

Precision/ 4-Channel/ Low-Level/ Differential Multiplexer

Intersil Corporation
Intersil Corporation

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