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PDF HI-548 Data sheet ( Hoja de datos )
| Número de pieza | HI-548 | |
| Descripción | Single 16 and 8/ Differential 8-Channel and 4-Channel CMOS Analog MUXs with Active Overvoltage Protection | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Data Sheet
HI-546, HI-547, HI-548, HI-549
June 1999 File Number 3150.2
Single 16 and 8, Differential 8-Channel
and 4-Channel CMOS Analog MUXs with
Active Overvoltage Protection
The HI-546, HI-547, HI-548 and HI-549 are analog
multiplexers with active overvoltage protection and
guaranteed rON matching. Analog input levels may greatly
exceed either power supply without damaging the device or
disturbing the signal path of other channels. Active
protection circuitry assures that signal fidelity is maintained
even under fault conditions that would destroy other
multiplexers.
Analog inputs can withstand constant 70VP-P levels with
±15V supplies. Digital inputs will also sustain continuous
faults up to 4V greater than either supply. In addition, signal
sources are protected from short circuiting should
multiplexer supply loss occur. Each input presents 1kΩ of
resistance under this condition. These features make the
HI-546, HI-547, HI-548 and HI-549 ideal for use in systems
where the analog inputs originate from external equipment
or separately powered circuitry. All devices are fabricated
with 44V Dielectrically Isolated CMOS technology. The
HI-546 is a single 16-Channel, the HI-547 is an 8-Channel
differential, the HI-548 is a single 8-Channel and the HI-549
is a 4-Channel differential device. If input overvoltage
protection is not needed the HI-506/507/508/509
multiplexers are recommended. For further information see
Application Notes AN520 and AN521.
For MIL-STD-883 compliant parts, request the HI-546/883,
HI-547/883, HI-548/883 and HI-549/883 datasheets.
Features
• Analog Overvoltage Protection. . . . . . . . . . . . . . . . . . 70VP-P
• No Channel Interaction During Overvoltage
• Guaranteed rON Matching
• Maximum Power Supply . . . . . . . . . . . . . . . . . . . . . . . 44V
• Break-Before-Make Switching
• Analog Signal Range . . . . . . . . . . . . . . . . . . . . . . . . ±15V
• Access Time (Typical) . . . . . . . . . . . . . . . . . . . . . . . 500ns
• Standby Power (Typical) . . . . . . . . . . . . . . . . . . . . . 7.5mW
Applications
• Data Acquisition
• Industrial Controls
• Telemetry
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
HI1-0546-5
0 to 75 28 Ld CERDIP
HI1-0546-2
-55 to 125 28 Ld CERDIP
HI3-0546-5
0 to 75 28 Ld PDIP
HI4P0546-5
0 to 75 28 Ld PLCC
HI9P0546-9
-40 to 85 28 Ld SOIC
HI1-0547-5
0 to 75 28 Ld CERDIP
HI3-0547-5
0 to 75 28 Ld PDIP
HI4P0547-5
0 to 75 28 Ld PLCC
HI9P0547-9
-40 to 85 28 Ld SOIC
HI1-0548-2
-55 to 125 16 Ld CERDIP
HI1-0548-5
0 to 75 16 Ld CERDIP
HI3-0548-5
0 to 75 16 Ld PDIP
HI4P0548-5
0 to 75 20 Ld PLCC
HI9P0548-5
0 to 75 16 Ld SOIC
HI9P0548-9
-40 to 85 16 Ld SOIC
HI1-0549-2
-55 to 125 16 Ld CERDIP
HI3-0549-5
0 to 75 16 Ld PDIP
HI4P0549-5
0 to 75 20 Ld PLCC
HI9P0549-5
0 to 75 16 Ld SOIC
HI9P0549-9
-40 to 85 16 Ld SOIC
PKG.
NO.
F28.6
F28.6
E28.6
N28.45
M28.3
F28.6
E28.6
N28.45
M28.3
F16.3
F16.3
E16.3
N20.35
M16.15
M16.15
F16.3
E16.3
N20.35
M16.15
M16.15
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1 page  
Schematic Diagrams
P
HI-546, HI-547, HI-548, HI-549
ADDRESS DECODER
V+
PP
PP
PP
N
A0 OR A0 N
A1 OR A1
N
A2 OR A2
N
A3 OR A3
N
ENABLE
DELETE A3 OR A3 INPUT FOR HI-547, HI-548, HI-549
DELETE A2 OR A2 INPUT FOR HI-549
TO P-CHANNEL
N N DEVICE OF
THE SWITCH
TO N-CHANNEL
DEVICE OF
THE SWITCH
V-
FROM
DECODE
MULTIPLEX SWITCH
OVERVOLTAGE PROTECTION
V+
P Q5
R11
1K
IN
D6 D7 D4
D5
N
Q6
V-
FROM
DECODE
N
N
OUT
P
5
5 Page 
HI-546, HI-547, HI-548, HI-549
Test Circuits and Waveforms TA = 25oC, VSUPPLY = ±15V, VAH = 4V, VAL = 0.8V, VREF = Open, Unless Otherwise Specified (Continued)
8
+15V/+10V
A +ISUPPLY
6
4 VSUPPLY = ± 15V
VSUPPLY = ± 10V
2
0
1K
10K 100K
1M 10M
TOGGLE FREQUENCY (Hz)
VA 50Ω
V+
A3 IN 1
HI-546 †
A2 IN 2
THRU
A1 IN 15
A0 IN 16
±10V/±5V
10V/ 5V
+4V EN
OUT
GND V-
10MΩ
A -ISUPPLY
-15V/-10V
†Similar connection for HI-547/HI-548/HI-549.
14pF
FIGURE 5A. SUPPLY CURRENT vs TOGGLE FREQUENCY
FIGURE 5B. TEST CIRCUIT
FIGURE 5. DYNAMIC SUPPLY CURRENT
900
VREF = OPEN FOR LOGIC HIGH LEVEL < 6V
800 VREF = LOGIC HIGH FOR LOGIC HIGH LEVELS > 6V
700
600
500
400
300
3 4 5 6 7 8 9 10 11 12 13 14 15
LOGIC LEVEL (HIGH) (V)
FIGURE 6A. ACCESS TIME vs LOGIC LEVEL (HIGH)
+15V
VA 50Ω
+4V
VREF V+
A3 IN 1
A2
IN 2 THRU
IN 15
A1 HI-546 †
A0 IN 16
EN
GND
OUT
V-
±10V
10V
10kΩ 50pF
-15V
† Similar connection for HI-547/HI-548/HI-549.
FIGURE 6B. TEST CIRCUIT
VAH = 4.0V ADDRESS
DRIVE (VA)
50%
0V
VA INPUT
2V/DIV.
+10V
OUTPUT
10%
tA
-10V
S1 ON
OUTPUT
5V/DIV.
S16 ON
200ns/DIV.
FIGURE 6C. MEASUREMENT POINTS
FIGURE 6. ACCESS TIME
FIGURE 6D. WAVEFORMS
11
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Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| HI-546 | Single 16 and 8/ Differential 8-Channel and 4-Channel CMOS Analog MUXs with Active Overvoltage Protection | Intersil Corporation |
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| HI-547 | Single 16 and 8/ Differential 8-Channel and 4-Channel CMOS Analog MUXs with Active Overvoltage Protection | Intersil Corporation |
| HI-547 | (HI-54x) Single 16 and 8/ Differential 8-Channel and 4-Channel CMOS Analog MUXs | Harris Corporation |
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