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부품번호 | HI-549 기능 |
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기능 | Single 16 and 8/ Differential 8-Channel and 4-Channel CMOS Analog MUXs with Active Overvoltage Protection | ||
제조업체 | Intersil Corporation | ||
로고 | |||
Data Sheet
HI-546, HI-547, HI-548, HI-549
June 1999 File Number 3150.2
Single 16 and 8, Differential 8-Channel
and 4-Channel CMOS Analog MUXs with
Active Overvoltage Protection
The HI-546, HI-547, HI-548 and HI-549 are analog
multiplexers with active overvoltage protection and
guaranteed rON matching. Analog input levels may greatly
exceed either power supply without damaging the device or
disturbing the signal path of other channels. Active
protection circuitry assures that signal fidelity is maintained
even under fault conditions that would destroy other
multiplexers.
Analog inputs can withstand constant 70VP-P levels with
±15V supplies. Digital inputs will also sustain continuous
faults up to 4V greater than either supply. In addition, signal
sources are protected from short circuiting should
multiplexer supply loss occur. Each input presents 1kΩ of
resistance under this condition. These features make the
HI-546, HI-547, HI-548 and HI-549 ideal for use in systems
where the analog inputs originate from external equipment
or separately powered circuitry. All devices are fabricated
with 44V Dielectrically Isolated CMOS technology. The
HI-546 is a single 16-Channel, the HI-547 is an 8-Channel
differential, the HI-548 is a single 8-Channel and the HI-549
is a 4-Channel differential device. If input overvoltage
protection is not needed the HI-506/507/508/509
multiplexers are recommended. For further information see
Application Notes AN520 and AN521.
For MIL-STD-883 compliant parts, request the HI-546/883,
HI-547/883, HI-548/883 and HI-549/883 datasheets.
Features
• Analog Overvoltage Protection. . . . . . . . . . . . . . . . . . 70VP-P
• No Channel Interaction During Overvoltage
• Guaranteed rON Matching
• Maximum Power Supply . . . . . . . . . . . . . . . . . . . . . . . 44V
• Break-Before-Make Switching
• Analog Signal Range . . . . . . . . . . . . . . . . . . . . . . . . ±15V
• Access Time (Typical) . . . . . . . . . . . . . . . . . . . . . . . 500ns
• Standby Power (Typical) . . . . . . . . . . . . . . . . . . . . . 7.5mW
Applications
• Data Acquisition
• Industrial Controls
• Telemetry
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
HI1-0546-5
0 to 75 28 Ld CERDIP
HI1-0546-2
-55 to 125 28 Ld CERDIP
HI3-0546-5
0 to 75 28 Ld PDIP
HI4P0546-5
0 to 75 28 Ld PLCC
HI9P0546-9
-40 to 85 28 Ld SOIC
HI1-0547-5
0 to 75 28 Ld CERDIP
HI3-0547-5
0 to 75 28 Ld PDIP
HI4P0547-5
0 to 75 28 Ld PLCC
HI9P0547-9
-40 to 85 28 Ld SOIC
HI1-0548-2
-55 to 125 16 Ld CERDIP
HI1-0548-5
0 to 75 16 Ld CERDIP
HI3-0548-5
0 to 75 16 Ld PDIP
HI4P0548-5
0 to 75 20 Ld PLCC
HI9P0548-5
0 to 75 16 Ld SOIC
HI9P0548-9
-40 to 85 16 Ld SOIC
HI1-0549-2
-55 to 125 16 Ld CERDIP
HI3-0549-5
0 to 75 16 Ld PDIP
HI4P0549-5
0 to 75 20 Ld PLCC
HI9P0549-5
0 to 75 16 Ld SOIC
HI9P0549-9
-40 to 85 16 Ld SOIC
PKG.
NO.
F28.6
F28.6
E28.6
N28.45
M28.3
F28.6
E28.6
N28.45
M28.3
F16.3
F16.3
E16.3
N20.35
M16.15
M16.15
F16.3
E16.3
N20.35
M16.15
M16.15
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
HI-546, HI-547, HI-548, HI-549
Functional Diagrams
HI-546
1K
IN 1
1K
IN 2
IN 16
1K
DECODER/
DRIVER
OUT
IN 1A
IN 8A
IN 1B
IN 8B
1K
1K
1K
1K
HI-547
DECODER/
DRIVER
OUT
A
OUT
B
OVERVOLTAGE
CLAMP AND
SIGNAL
ISOLATION
5V
REF
† DIGITAL INPUT
PROTECTION
LEVEL
SHIFT
†††† †
VREF A0 A1 A2 A3 EN
OVERVOLTAGE
CLAMP AND
SIGNAL
ISOLATION
5V
REF
† DIGITAL INPUT
PROTECTION
LEVEL
SHIFT
††† †
VREF A0 A1 A2 EN
1K
IN 1
1K
IN 2
1K
IN 8
HI-548
OUT
DECODER/
DRIVER
OVERVOLTAGE
CLAMP AND
SIGNAL
ISOLATION
5V
REF
† DIGITAL INPUT
PROTECTION
LEVEL
SHIFT
† † ††
A0 A1 A2 EN
IN 1A
IN 4A
IN 1B
IN 4B
1K
1K
1K
1K
HI-549
OVERVOLTAGE
CLAMP AND
SIGNAL
ISOLATION
5V
REF
† DIGITAL INPUT
PROTECTION
DECODER/
DRIVER
OUT
A
OUT
B
LEVEL
SHIFT
† ††
A0 A1 EN
4
4페이지 HI-546, HI-547, HI-548, HI-549
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +44V
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +22V
V- to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25V
Digital Input Voltage (VEN, VA) . . . . . . . . . . . . . (V-) -4V to (V+) +4V
Analog Signal (VIN, VOUT). . . . . . . . . . . . . . . (V-) -20V to (V+) +20V
or 20mA, Whichever Occurs First
Continuous Current, IN or OUT . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Peak Current, IN or OUT (Pulsed 1ms, 10% Duty Cycle Max) . . 40mA
Operating Conditions
Temperature Ranges
HI-546/548/549-2 . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
HI-546/547/548/549-5 . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC
HI-546/547/548/549-9 . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W) θJC (oC/W)
16 Ld CERDIP Package . . . . . . . . . . .
85
32
28 Ld CERDIP Package . . . . . . . . . . .
55
18
28 Ld PDIP Package . . . . . . . . . . . . .
60
N/A
16 Ld PDIP Package . . . . . . . . . . . . .
90
N/A
28 Ld PLCC Package . . . . . . . . . . . . .
70
N/A
20 Ld PLCC Package . . . . . . . . . . . . .
80
N/A
28 Ld SOIC Package . . . . . . . . . . . . .
75
N/A
16 Ld SOIC Package . . . . . . . . . . . . . 105
N/A
Maximum Junction Temperature
Ceramic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .175oC
Plastic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC
(PLCC, SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications Supplies = +15V, -15V; VREF Pin = Open; VAH (Logic Level High) = 4V; VAL (Logic Level Low) = 0.8V; Unless
Otherwise Specified. For Test Conditions, Consult Test Circuits Section
PARAMETER
TEST
CONDITIONS
TEMP
(oC)
MIN
-2
TYP MAX
-5, -9
MIN TYP MAX UNITS
SWITCHING CHARACTERISTICS
Access Time, tA
25 - 0.5 -
- 0.5 - µs
Full -
- 1.0 -
- 1.0 µs
Break-Before Make Delay, tOPEN
Enable Delay (ON), tON(EN)
25 25 80 - 25 80 - ns
25 - 300 500 - 300 - ns
Full -
- 1000 -
-
1000
ns
Enable Delay (OFF), tOFF(EN)
25 - 300 500 - 300 - ns
Full -
- 1000 -
-
1000
ns
Settling Time
To 0.1%
25 - 1.2 -
- 1.2 - µs
To 0.01%
25 - 3.5 -
- 3.5 - µs
Off Isolation
Note 6
25 50 68 - 50 68 - dB
Channel Input Capacitance, CS(OFF)
Channel Output Capacitance CD(OFF)
HI-546
25 - 10 -
25 - 52 -
- 10 - pF
- 52 - pF
HI-547
25 - 30 -
- 30 - pF
HI-548
25 - 25 -
- 25 - pF
HI-549
25 - 12 -
- 12 - pF
Input to Output Capacitance, CDS(OFF)
DIGITAL INPUT CHARACTERISTICS
25 - 0.1 -
- 0.1 - pF
Input Low Threshold, TTL Drive, VAL
Input High Threshold, VAH (Note 8)
MOS Drive, VAL (HI-546/547 Only)
MOS Drive, VAH (HI-546/547 Only)
Input Leakage Current (High or Low), IA
VREF = 10V
VREF = 10V
Note 5
Full -
- 0.8 -
- 0.8 V
Full 4.0
-
- 4.0 -
-
V
25 -
- 0.8 -
- 0.8 V
25 6.0
-
- 6.0 -
-
V
Full -
- 1.0 -
- 1.0 µA
7
7페이지 | |||
구 성 | 총 15 페이지수 | ||
다운로드 | [ HI-549.PDF 데이터시트 ] |
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구매 문의 | 일반 IC 문의 : 샘플 및 소량 구매 ----------------------------------------------------------------------- IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한 광범위한 전력 반도체를 판매합니다. 전력 반도체 전문업체 상호 : 아이지 인터내셔날 사이트 방문 : [ 홈페이지 ] [ 블로그 1 ] [ 블로그 2 ] |
부품번호 | 상세설명 및 기능 | 제조사 |
HI-546 | Single 16 and 8/ Differential 8-Channel and 4-Channel CMOS Analog MUXs with Active Overvoltage Protection | Intersil Corporation |
HI-546 | (HI-54x) Single 16 and 8/ Differential 8-Channel and 4-Channel CMOS Analog MUXs | Harris Corporation |
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