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부품번호 HI-565 기능
기능 High Speed/ Monolithic D/A Converter with Reference
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HI-565 데이터시트, 핀배열, 회로
Data Sheet
HI-565A
June 1999 File Number 3109.2
High Speed, Monolithic D/A Converter
with Reference
The HI-565A is a fast, 12-bit, current output, digital-to-analog
converter. The monolithic chip includes a precision voltage
reference, thin-film R2R ladder, reference control amplifier
and twelve high speed bipolar current switches.
The Intersil dielectric isolation process provides latch free
operation while minimizing stray capacitance and leakage
currents, to produce an excellent combination of speed and
accuracy. Also, ground currents are minimized to produce a
low and constant current through the ground terminal, which
reduces error due to code dependent ground currents.
HI-565A dice are laser trimmed for a maximum integral
nonlinearity error of ±0.5 LSB at 25oC. In addition, the low
noise buried zener reference is trimmed both for absolute
value and temperature coefficient. Power dissipation is
typically 250mW, with ±15V supplies.
The HI-565A is offered in both commercial and military
grades. See Ordering Information.
Features
• 12-Bit DAC and Reference on a Single Chip
• Pin Compatible With AD565A
• Very High Speed: Settles to ±0.5 LSB in 250ns (Max)
Full Scale Switching Time 30ns (Typ)
• Guaranteed For Operation With ±12V Supplies
• Monotonicity Guaranteed Over Temperature
• Nonlinearity Guaranteed Over Temp (Max) . . . . ±0.5 LSB
• Low Gain Drift (Max, DAC Plus Ref) . . . . . . . . .25ppm/oC
• Low Power Dissipation . . . . . . . . . . . . . . . . . . . . .250mW
Applications
• CRT Displays
• High Speed A/D Converters
• Signal Reconstruction
• Waveform Synthesis
Ordering Information
PART NUMBER
HI1-565AJD-5
HI1-565AKD-5
HI1-565ASD-2
HI1-565ATD-2
HI1-565ASD/883
HI1-565ATD/883
LINEARITY (INL)
0.50 LSB
0.25 LSB
0.50 LSB
0.25 LSB
0.50 LSB
0.25 LSB
Pinout
HI-565A (SBDIP)
TOP VIEW
LINEARITY (DNL)
0.75 LSB
0.50 LSB
0.75 LSB
0.50 LSB
0.50 LSB
0.50 LSB
NC 1
NC 2
VCC 3
REF OUT (+10V) 4
REF GND 5
REF IN 6
-VEE 7
BIPOLAR R IN 8
IDAC OUT 9
10V SPAN R 10
20V SPAN R 11
POWER GND 12
24 BIT 1 (MSB) IN
23 BIT 2 IN
22 BIT 3 IN
21 BIT 4 IN
20 BIT 5 IN
19 BIT 6 IN
18 BIT 7 IN
17 BIT 8 IN
16 BIT 9 IN
15 BIT 10 IN
14 BIT 11 IN
13 BIT 12 (LSB) IN
TEMP. RANGE (oC)
0 to 75
0 to 75
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
24 Ld SBDIP
24 Ld SBDIP
24 Ld SBDIP
24 Ld SBDIP
24 Ld SBDIP
24 Ld SBDIP
Functional Diagram
PKG. NO.
D24.6
D24.6
D24.6
D24.6
D24.6
D24.6
REF
OUT VCC
43
+
HI-565A
-
REF
IN
6 19.95K
5
IREF 0.5mA
3.5K
+
-
REF
GND
3K
7 12
8
BIP. OFF
5K
9.95K
DAC
IO
(4X IREF
X CODE)
5K
2.5K
24 . . . . . .13
11 20V
SPAN
10 10V
SPAN
9
OUT
-VEE PWR MSB
GND
LSB
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999




HI-565 pdf, 반도체, 판매, 대치품
HI-565A
Definitions of Specifications
Digital Inputs
The HI-565A accepts digital input codes in binary format and
may be user connected for any one of three binary codes.
Straight Binary, Two’s Complement (Note 5), or Offset
Binary, (See Operating Instructions).
DIGITAL
INPUT
MSB...LSB
TABLE 1.
ANALOG OUTPUT
STRAIGHT
BINARY
OFFSET
BINARY
(NOTE 5)
TWO'S
COMPLEMENT
000...000
100...000
111...111
Zero
1/2FS
+FS - 1 LSB
-FS
(Full Scale)
Zero
+FS - 1 LSB
Zero
-FS
Zero - 1 LSB
011...111 1/2FS - 1 LSB Zero - 1 LSB
+FS - 1 LSB
NOTE:
5. Invert MSB with external inverter to obtain Two’s Complement
Coding.
Nonlinearity of a D/A converter is an important measure of
its accuracy. It describes the deviation from an ideal straight
line transfer curve drawn between zero (all bits OFF) and full
scale (all bits ON) (End Point Method).
Differential Nonlinearity for a D/A converter, it is the
difference between the actual output voltage change and the
ideal (1 LSB) voltage change for a one bit change in code. A
Differential Nonlinearity of ±1 LSB or less guarantees
monotonicity; i.e., the output always increases for an
increasing input.
Settling Time is the time required for the output to settle to
within the specified error band for any input code transition.
It is usually specified for a full scale or major carry transition,
settling to within ±0.5 LSB of final value.
Gain Drift is the change in full scale analog output over the
specified temperature range, expressed in parts per million
of full scale range per oC (ppm of FSR/oC). Gain error is
measured with respect to 25oC at high (TH) and low (TL)
temperatures. Gain drift is calculated for both high (TH
-25oC) and low ranges (25oC -TL) by dividing the gain error
by the respective change in temperature. The specification is
the larger of the two representing worst-case drift.
Offset Drift is the change in analog output with all bits OFF
over the specified temperature range expressed in parts per
million of full scale range per oC (ppm of FSR/oC). Offset
error is measured with respect to 25oC at high (TH) and low
(TL) temperatures. Offset Drift is calculated for both high (TH
-25oC) and low (25oC -TL) ranges by dividing the offset error
by the respective change in temperature. The specification
given is the larger of the two, representing worst-case drift.
Power Supply Sensitivity is a measure of the change in
gain and offset of the D/A converter resulting from a change
in -15V or +15V supplies. It is specified under DC conditions
and expressed as parts per million of full scale range per
percent of change in power supply (ppm of FSR/%).
Compliance Voltage is the maximum output voltage range
that can be tolerated and still maintain its specified accuracy.
Compliance Limit implies functional operation only, and
makes no claims to accuracy.
Glitch a glitch on the output of a D/A converter is a transient
spike resulting from unequal internal ON-OFF switching
times. Worst case glitches usually occur at half-scale or the
major carry code transition from 011...1 to 100...0 or vice
versa. For example, if turn ON is greater than turn OFF for
011...1 to 100...0, an intermediate state of 000...0 exists,
such that, the output momentarily glitches toward zero
output. Matched switching times and fast switching will
reduce glitches considerably.
Detailed Description
Op Amp Selection
The Hl-565As current output may be converted to voltage
using the standard connections shown in Figures 1 and 2.
The choice of operational amplifier should be reviewed for
each application, since a significant trade-off may be made
between speed and accuracy.
For highest precision, use an HA-5130. This amplifier
contributes negligible error, but requires about 11µs to settle
within ±0.1% following a 10V step.
The Intersil HA-2600 is the best all-around choice for this
application, and it settles in 1.5µs (also to ±0.1% following a
10V step). Remember, settling time for the DAC amplifier
combination is the square root of tD2 plus tA2, where tD, tA
are settling times for the DAC and amplifier.
No-Trim Operation
The Hl-565A will perform as specified without calibration
adjustments. To operate without calibration, substitute 50
resistors for the 100trimming potentiometers: In Figure 1
replace R2 with 50also remove the network on pin 8 and
connect 50to ground. For bipolar operation in Figure 2,
replace R3 and R4 with 50resistors.
With these changes, performance is guaranteed as shown
under Specifications, “External Adjustments”. Typical unipolar
zero will be ±0.5 LSB plus the op amp offset.
The feedback capacitor, C, must be selected to minimize
settling time.
Calibration
Calibration provides the maximum accuracy from a
converter by adjusting its gain and offset errors to zero. For
the Hl-565A, these adjustments are similar whether the
current output is used, or whether an external op amp is
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HI-565 전자부품, 판매, 대치품
HI-565A
OUT
PULSE
GENERATOR
NO. 1
SYNC
IN
TRIG
OUT
PULSE
GENERATOR
NO. 2
OUT
20V ±20%
(A)
BIAS
(C)
HI-565A
24 8 TURN ON
23
9.95K
P
+5V
14
13 2mA
11
5K
10
NC
5K
9
2.5K
5
TURN OFF
STROBE
(B) IN (D)
COMP
OUT
SCHOTTKY
DIODES
LSB
~100kHz
12
DVM
200K
10 90 0.1µF VLSB
SUPPLY
FIGURE 3A.
Other Considerations
Grounds
The Hl-565A has two ground terminals, pin 5 (REF GND)
and pin 12 (PWR GND). These should not be tied together
near the package unless that point is also the system signal
ground to which all returns are connected. (If such a point
exists, then separate paths are required to pins 5 and 12).
The current through pin 5 is near-zero DC (Note 1); but pin
12 carries up to 1.75mA of code-dependent current from bits
1, 2, and 3. The general rule is to connect pin 5 directly to
the system “quiet” point, usually called signal or analog
ground. Connect pin 12 to the local digital or power ground.
Then, of course, a single path must connect the
analog/signal and digital/power grounds.
Layout
Connections to pin 9 (IOUT) on the Hl-565A are most critical
for high speed performance. Output capacitance of the DAC
is only 20pF, so a small change or additional capacitance
may alter the op amp’s stability and affect settling time.
Connections to pin 9 should be short and few. Component
leads should be short on the side connecting to pin 9 (as for
feedback capacitor C). See the Settling Time section.
+3V
(A)
0V
0V
(B)
(TURN -400mV
OFF)
2V
(C)
0.8V
4V
(D)
0V
50%
tX
50%
-0.5 LSB
DIGITAL
INPUT
DAC
OUTPUT
SETTLING TIME
tD = COMPARATOR DELAY
COMP.
STROBE
EQUAL
BRIGHTNESS
COMP.
OUT
FIGURE 3B.
Bypass Capacitors
Power supply bypass capacitors on the op amp will serve the
HI-565A also. If no op amp is used, a 0.01µF ceramic
capacitor from each supply terminal to pin 12 is sufficient,
since supply current variations are small.
Current Cancellation
Current cancellation is a two step process within the
HI-565A in which code dependent variations are eliminated,
then the resulting DC current is supplied internally. First an
auxiliary 9-bit R-2R ladder is driven by the complement of
the DACs input code. Together, the main and auxiliary
ladders draw a continuous 2.25mA from the internal ground
node, regardless of input code. Part of this DC current is
supplied by the zener voltage reference, and the remainder
is sourced from the positive supply via a current mirror which
is laser trimmed for zero current through the external
terminal (pin 5).
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관련 데이터시트

부품번호상세설명 및 기능제조사
HI-565

High Speed/ Monolithic D/A Converter with Reference

Intersil Corporation
Intersil Corporation
HI-565A

High Speed/ Monolithic D/A Converter with Reference

Intersil Corporation
Intersil Corporation

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