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HI-8040 데이터시트 PDF




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부품번호 HI-8040 기능
기능 CMOS HIGH VOLTAGE DISPLAY DRIVER
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HI-8040 데이터시트, 핀배열, 회로
September 1999
HI-8040
GENERAL DESCRIPTION
The HI-8040 is a CMOS integrated circuit designed for high
voltage LCD display drive applications. It can drive 85
segments at voltages between +5 and -30 volts. An optional
negative converter can generate the negative display drive
voltage. Test inputs facilitate opens and shorts testing. The
backplane frequency is checked and, as long as power is
available, the segments are shut "Off" if the frequency
becomes too low.
The HI-8040 is part of a family of display drivers which
control segment information in the same way. Data is
serially clocked into the device and the data for all segment
outputs are latched in parallel when the Load input
transitions from high to low. With the Data Out from the shift
register available, devices may be cascaded to obtain more
segment outputs. The shift register is 85 bits long.
The die is metal mask programmable to provide for various
package and/or cascade tap options. Consult your Holt
Sales representative to explore the possibilities.
APPLICATIONS
! Dichroic Liquid Crystal Displays
! Standard Liquid Crystal Displays
PIN CONFIGURATION (Top View)
S60 81
S61 82
S62 83
S63 84
S64 85
S65 86
S66 87
S67 88
S68 89
S69 90
S70 91
S71 92
S72 93
S73 94
S74 95
S75 96
S76 97
S77 98
S78 99
S79 100
100 PIN QUAD CERPACK
50 S29
49 S28
48 S27
47 S26
46 S25
45 S24
44 S23
43 S22
42 S21
41 S20
40 S19
39 S18
38 S17
37 S16
36 S15
35 S14
34 S13
33 S12
32 S11
31 S10
FEATURES
! 4 MHz serial input data rate
! 85 segment outputs
! Cascadable
! 5 Volt inputs translated to 35 Volts
! Test pins allow hardware all "ON", all "OFF" or
alternating
! Monitors backplane oscillation and forces all
segments to "OFF" condition if below 10Hz
! Negative voltage converter available on-chip
! CMOS low power
! Military processing available
See page 3-19 for magnified view
FUNCTIONAL BLOCK DIAGRAM
DIN Þ
CL Þ
CS Þ
LD Þ
BPOSC
BPIN
ÞÞ
Oscillator
Divider
Voltage
Translator
High Voltage
Buffer
Þ BP
DATA IN
85 Stage
Shift Register
CLK
DOUT
85
LE 8 5 B i t L a t c h
Voltage
Translators
High Voltage
Drivers
85 SEGMENTS
(DS8040 Rev. NEW)
HOLT INTEGRATED CIRCUITS
3-15
9/99




HI-8040 pdf, 반도체, 판매, 대치품
Voltages referenced to VSS = 0V
Supply Voltage
VDD........................ 0V to 7V
VEE................VDD-35V to 0V
Voltage at any input, except BPIN....-0.3 to VDD+0.3V
Voltage at BPIN input.................VDD-35 to VDD+0.3V
DC Current any input pin...................................10 mA
Power Dissipation......................................................300 mW
Operating Temperature Range - Industrial...... -40° to +85°C
Operating Temperature Range - Hi-Temp/Mil...-55° to +125°C
Storage Temperature Range............................-65° to +150°C
NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only.
Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
VDD = 5V ±5%, VEE = -21.5V, VSS = 0V, TA = operating temperature range (unless otherwise specified).
PARAMETER
Operating Voltage
Supply Current: (Converter Off, fBP = 100Hz)
Input Low Voltage
(excluding BPIN)
Input High Voltage
(excluding BPIN)
Input Low Voltage
(BPIN)
Input High Voltage
(BPIN)
Input Current
Input Capacitance
(Guaranteed, not tested)
Segment Output Impedance
Backplane Output Impedance
Data Out Current:
Source Current
Sink Current
Voltage Converter:
@ No Load
(VDD - VSS = 5V, TA = 25°C) @ 0.1mA Load
@ 10KW Load
Offset Voltage
(Guaranteed, not tested)
SYMBOL
VDD
IDD
IEE
VIL
VIH
VILX
VIHX
IIN
CI
RSEG
RBP
IDOH
IDOL
VEEC
IDD
VEEC
VOS
CONDITION
Static, No Load
Static, No Load
VIN = 0 to 5V
IL = 10µA
IL = 10µA
VOH = 4.5
VOL = 0.4
See Fig. 2
See Fig. 2
See Fig. 2
See Fig. 4
MIN TYP
3.0
0
2
VEE
0.8 VDD
3.2
-22 -21.5
-20
MAX
7.0
300
120
0.8
VDD
0.6 VDD
VDD
100
5
15,000
600
-3.0
-21
1.8
25
UNITS
V
µA
µA
V
V
V
V
nA
pF
W
W
mA
mA
V
mA
V
mV
VDD = 5V , VEE = -21.5V, VSS = 0V, TA = operating temperature range (unless otherwise specified).
PARAMETER
Clock Period
Clock Pulse Width
Data In - Setup
Data In - Hold
Chip Select - Setup to Clock
Chip Select - Hold to Clock
Load - Setup to Clock
Chip Select - Setup to Load
Load Pulse Width
Chip Select - Hold to Load
Data Out Valid, from Clock
non-cascaded
cascaded
non-cascaded
cascaded
SYMBOL
tCL
tCL
tCW
tCW
tDS
tDH
tCSS
tCSH
tLS
tCSL
tLW
tLCS
tCDO
VDD
5V
5V
5V
5V
5V
5V
5V
5V
5V
5V
5V
5V
5V
MIN
TYP
MAX
250
500
125
250
80
80
100
120
120
0
130
120
170
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
HOLT INTEGRATED CIRCUITS
3-18

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