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PDF AT24CM01 Data sheet ( Hoja de datos )
| Número de pieza | AT24CM01 | |
| Descripción | EEPROM | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Atmel AT24CM01
I2C-Compatible (2-wire) Serial EEPROM
1-Mbit (131,072 x 8)
Features
DATASHEET
Low voltage and standard voltage operation available
1.7V (VCC = 1.7V to 5.5V)
2.5V (VCC = 2.5V to 5.5V)
Internally organized 131,072 x 8
2-wire serial interface
Schmitt Triggers, filtered inputs for noise suppression
Bidirectional data transfer protocol
400kHz (1.7V) and 1MHz (5V, 2.5V) compatibility
Write Protect pin for hardware data protection
256-byte Page Write mode
Partial page writes allowed
Random and Sequential Read modes
Self-timed write cycle (5ms max)
High reliability
Endurance: 1,000,000 write cycles
Data retention: 40 years
Green package options (Pb/Halide-free/RoHS Compliant)
8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, and 8-ball WLCSP
Die sale options: wafer form and tape and reel available
Description
The Atmel® AT24CM01 provides 1,048,576 bits of Serial Electrically Erasable and
Programmable Read-Only Memory (EEPROM) organized as 131,072 words of eight
bits each. The device’s cascadable feature allows up to four devices to share a
common 2-wire bus. The device is optimized for use in many industrial and commercial
applications where low power and low voltage operation are essential. The devices are
available in space-saving 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, and
8-ball WLCSP. In addition, the entire family is available in 1.7V (1.7V to 5.5V) and 2.5V
(2.5V to 5.5V) versions.
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
Free Datasheet http://www.datasheet-pdf.com/
1 page  
Table 5-3. AC Characteristics
Applicable over recommended operating range from TAI = -40C to +85C, VCC = 1.7V to 5.5V (where applicable),
CL = 100pF (unless otherwise noted). Test conditions are listed in Note 2.
1.7V
2.5V, 5.0V
Symbol
Parameter
Min Max Min Max
Units
fSCL
tLOW
tHIGH
tI
tAA
tBUF
Clock Frequency, SCL
Clock Pulse Width Low
Clock Pulse Width High
Noise Suppression Time(1)
Clock Low to Data Out Valid
Time the bus must be free before a new
transmission can start(1)
1300
600
50
1300
400
100
900
1000
400
400
50
50 550
500
kHz
ns
ns
ns
ns
ns
tHD.STA
tSU.STA
tHD.DAT
tSU.DAT
tR
tF
tSU.STO
tDH
tWR
Endurance(1)
Start Hold Time
Start Set-up Time
Data In Hold Time
Data In Set-up Time
Inputs Rise Time(1)
Inputs Fall Time(1)
Stop Set-up Time
Data Out Hold Time
Write Cycle Time
25°C, Page Mode, 3.3V
600 250
ns
600 250
ns
00
ns
100 100
ns
300 300 ns
300 100 ns
600 250
ns
50 50
ns
5 5 ms
1,000,000
Write Cycles
Notes: 1. This parameter is ensured by characterization only.
2. AC measurement conditions:
RL (connects to VCC): 1.3 k (2.5V, 5V), 10 k (1.7V)
Input pulse voltages: 0.3 VCC to 0.7 VCC
Input rise and fall times: 50ns
Input and output timing reference voltages: 0.5 VCC
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
5
Free Datasheet http://www.datasheet-pdf.com/
5 Page 
9. Read Operations
Read operations are initiated the same way as write operations with the exception that the read/write select bit in the
device address word is set to one. There are three read operations: Current Address Read, Random Address Read, and
Sequential Read.
Current Address Read: The internal data word address counter maintains the last address accessed during the last
read or write operation, incremented by one. This address stays valid between operations as long as the VCC to the part
is maintained. The address “rollover” during read is from the last byte of the last page, to the first byte of the first page of
the memory.
Once the device address with the read/write select bit set to one is input and acknowledged by the EEPROM, the current
address data word is serially clocked out on the SDA line. The microcontroller does not respond with a zero but does
generate a following Stop condition (see Figure 9-1).
Figure 9-1. Current Address Read
SDA LINE
S
T
A
R Device
T Address
R
E
A
D
M PR A
S 0/ C
B WK
Data
S
T
O
P
N
O
A
C
K
Random Read: A Random Read requires an initial byte write sequence to load in the data word address. This is known
as a “dummy write” operation. Once the device address word and data word address are clocked in and acknowledged
by the EEPROM, the microcontroller must generate another Start condition. The microcontroller now initiates a current
address read by sending a device address with the read/write select bit high. The EEPROM acknowledges the device
address and serially clocks out the data word on the SDA line. The microcontroller does not respond with a zero but does
generate a following Stop condition (see Figure 9-2).
Figure 9-2. Random Read
SDA LINE
S
T
A
R Device
T Address
M
S
B
W
R
I
T
E
PRA
0/C
WK
First Word
Address
Second Word
Address
S
T
A
R
T
A LA
C SC
K BK
Device
Address
R
E
A
D
PRA
0 /C
WK
Dummy Write
Data (n)
S
T
O
P
N
O
A
C
K
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
11
Free Datasheet http://www.datasheet-pdf.com/
11 Page | ||
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| PDF Descargar | [ Datasheet AT24CM01.PDF ] | |
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