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PDF SI5351A Data sheet ( Hoja de datos )
| Número de pieza | SI5351A | |
| Descripción | (SI5351A/B/C) I2C-PROGRAMMABLE ANY-FREQUENCY CMOS CLOCK GENERATOR + VCXO | |
| Fabricantes | Silicon Labs | |
| Logotipo |  |
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Si5351A/B/C
I2C-PROGRAMMABLE ANY-FREQUENCY CMOS CLOCK
GENERATOR + VCXO
Features
Generates up to 8 non-integer-related Glitchless frequency changes
frequencies from 8 kHz to 160 MHz
Separate voltage supply pins:
I2C user definable configuration
Core VDD: 2.5 or 3.3 V
Exact frequency synthesis at each output Output VDDO: 1.8, 2.5, or 3.3 V
(0 ppm error)
Excellent PSRR eliminates external
Highly linear VCXO
power supply filtering
Optional clock input (CLKIN)
Very low power consumption
Low output period jitter: 100 ps pp
Adjustable output-output delay
Configurable spread spectrum selectable Available in 3 packages types:
at each output
10-MSOP: 3 outputs
Operates from a low-cost, fixed frequency 24-QSOP: 8 outputs
crystal: 25 or 27 MHz
20-QFN (4x4 mm): 8 outputs
Supports static phase offset
PCIE Gen 1 compliant
Programmable rise/fall time control
Supports HCSL compatible swing
10-MSOP
24-QSOP
Applications
HDTV, DVD/Blu-ray, set-top box
Audio/video equipment, gaming
Printers, scanners, projectors
Residential gateways
Networking/communication
Servers, storage
XO replacement
20-QFN
Description
The Si5351 is an I2C configurable clock generator that is ideally suited for replacing
crystals, crystal oscillators, VCXOs, phase-locked loops (PLLs), and fanout buffers in
cost-sensitive applications. Based on a PLL/VCXO + high resolution MultiSynth fractional
divider architecture, the Si5351 can generate any frequency up to 160 MHz on each of its
outputs with 0 ppm error. Three versions of the Si5351 are available to meet a wide
variety of applications. The Si5351A generates up to 8 free-running clocks using an
internal oscillator for replacing crystals and crystal oscillators. The Si5351B adds an
internal VCXO and provides the flexibility to replace both free-running clocks and
synchronous clocks. The Si5351B eliminates the need for higher cost, custom pullable
crystals while providing reliable operation over a wide tuning range. The Si5351C offers
the same flexibility but synchronizes to an external reference clock (CLKIN).
Ordering Information:
See page 66
Functional Block Diagram
XA
OSC
XB
PLLA
PLLB
Multi
Synth
0
Multi
Synth
1
I2C
SSEN
OEB
N = 2 or 7
Multi
Synth
N
Si5351A
XA
XB
VC
OSC
I2C
SSEN
OEB
PLL
VCXO
Multi
Synth
0
Multi
Synth
1
Multi
Synth
2
Multi
Synth
3
Multi
Synth
4
Multi
Synth
5
Multi
Synth
6
Multi
Synth
7
Si5351B
XA
OSC
XB
CLKIN
I2C
INTR
OEB
PLLA
PLLB
Multi
Synth
0
Multi
Synth
1
Multi
Synth
2
Multi
Synth
3
Multi
Synth
4
Multi
Synth
5
Multi
Synth
6
Multi
Synth
7
Si5351C
Preliminary Rev. 0.95 8/11
Copyright © 2011 by Silicon Laboratories
Si5351A/B/C
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Free Datasheet http://www.datasheet-pdf.com/
1 page  
Si5351A/B/C
Table 3. AC Characteristics
(VDD = 2.5 V ±10%, or 3.3 V ±10%, TA = –40 to 85 °C)
Parameter
Symbol
Test Condition
Power-up Time
Output Enable Time
Output Phase Offset
Spread Spectrum Frequency
Deviation
TRDY
TOE
PSTEP
SSDEV
From VDD = VDDmin to valid
output clock, CL = 5 pF,
fCLKn > 1 MHz
From OEB pulled low to valid
clock output, CL = 5 pF,
fCLKn > 1 MHz
Down spread
Center spread
Spread Spectrum Modulation
Rate
SSMOD
VCXO Specifications (Si5351B only)
VCXO Control Voltage Range
Vc
VCXO Gain (configurable)
Kv Vc = 10–90% of VDD, VDD = 3.3 V
VCXO Control Voltage Linearity KVL
Vc = 10–90% of VDD
VCXO Pull Range
(configurable)
PR VDD = 3.3 V*
VCXO Modulation Bandwidth
*Note: Contact Silicon Labs for 2.5 V VCXO operation.
Min
—
—
—
–0.1
±0.1
30
0
18
–5
±30
—
Typ
1
—
333
—
—
31.5
VDD/2
—
—
0
10
Max
10
10
—
–2.5
±1.5
33
VDD
150
+5
±240
—
Unit
ms
µs
ps/step
%
%
kHz
V
ppm/V
%
ppm
kHz
Table 4. Input Clock Characteristics
(VDD = 2.5 V ±10%, or 3.3 V ±10%, TA = –40 to 85 °C)
Parameter
Symbol Test Condition
Min
Typ
Max Units
CLKIN Input Low Voltage
CLKIN Input High Voltage
CLKIN Frequency Range
VIL
VIH
fCLKIN
–0.1
— 0.3 x VDD
V
0.7 x VDD
—
3.60
V
10 — 100 MHz
Preliminary Rev. 0.95
5
Free Datasheet http://www.datasheet-pdf.com/
5 Page 
Si5351A/B/C
3. Functional Description
The Si5351 is a versatile I2C programmable clock generator that is ideally suited for replacing crystals, crystal
oscillators, VCXOs, PLLs, and buffers. A block diagram showing the general architecture of the Si5351 is shown in
Figure 3. The device consists of an input stage, two synthesis stages, and an output stage.
The input stage accepts an external crystal (XTAL), a clock input (CLKIN), or a control voltage input (VC)
depending on the version of the device (A/B/C). The first stage of synthesis multiplies the input frequencies to an
high-frequency intermediate clock, while the second stage of synthesis uses high resolution MultiSynth fractional
dividers to generate the desired output frequencies. Additional integer division is provided at the output stage for
generating output frequencies as low as 8 kHz. Crosspoint switches at each of the synthesis stages allows total
flexibility in routing any of the inputs to any of the outputs.
Because of this high resolution and flexible synthesis architecture, the Si5351 is capable of generating
synchronous or free-running non-integer related clock frequencies at each of its outputs, enabling one device to
synthesize clocks for multiple clock domains in a design.
Input
Stage
Synthesis
Stage 1
CLKIN
XA
XTAL
XB
Div
OSC
VC VCXO
PLL A
(SSC)
PLL B
(VCXO)
Synthesis
Stage 2
Multi
Synth
0
Multi
Synth
1
Multi
Synth
2
Multi
Synth
3
Multi
Synth
4
Multi
Synth
5
Multi
Synth
6
Multi
Synth
7
Output
Stage
R0
R1
R2
R3
R4
R5
R6
R7
VDDOA
CLK0
CLK1
VDDOB
CLK2
CLK3
VDDOC
CLK4
CLK5
VDDOD
CLK6
CLK7
Figure 3. Si5351 Block Diagram
3.1. Input Stage
3.1.1. Crystal Inputs (XA, XB)
The Si5351 uses a fixed-frequency standard AT-cut crystal as a reference to the internal oscillator. The output of
the oscillator can be used to provide a free-running reference to one or both of the PLLs for generating
asynchronous clocks. The output frequency of the oscillator will operate at the crystal frequency, either 25 MHz or
27 MHz. The crystal is also used as a reference to the VCXO to help maintain its frequency accuracy.
Internal load capacitors (CL) are provided to eliminate the need for external components when connecting a crystal
to the Si5351. Options for internal load capacitors are 6, 8, or 10 pF. Crystals with alternate load capacitance
requirements are supported using additional external load capacitors as shown in Figure 4. Refer to application
note AN551 for crystal recommendations.
CL XA
XB
CL
Optional
Additional external
load capacitors
(< 2 pF)
CL
CL Selectable internal
load capacitors
6 pF, 8 pF, 10 pF
Figure 4. External XTAL with Optional Load Capacitors
Preliminary Rev. 0.95
11
Free Datasheet http://www.datasheet-pdf.com/
11 Page | ||
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