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OZ976 데이터시트 PDF




O2Micro에서 제조한 전자 부품 OZ976은 전자 산업 및 응용 분야에서
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부품번호 OZ976 기능
기능 (OZ972 / OZ976) Intelligent CCFL Inverter Controller
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OZ976 데이터시트, 핀배열, 회로
OZ972/OZ976
Change Summary
CHANGES
No. Applicable Section
1. Ordering Information
2. OZ972 Typical Application Circuit
3. Throughout data sheet
Description
a) Add OZ972GN, OZ972IGN, OZ976TN & OZ976ITN
Change C18 value from “0.1u” to “open”
Miscellaneous corrections
Page(s)
1
16
---
REVISION HISTORY
Revision No.
0.97
0.98
0.99
1.0
Description of change
Initial release
1. Revise part number in header and footer to read “OZ972/OZ976” and ensure text diagrams and figures are in this sequence throughout data
sheet; 2. Add alpha to part numbers in “Ordering Information”; 3. Add patent number in footer of first page; 4. Update the OZ972 and OZ976
functional block diagrams, application circuit figures and functional specifications; 5. Revise "Functional Specifications" for OZ972 and OZ976 as
follows: OZ972 - a) first test condition listed, b) add note (2), c) add note (2) to Input Offset Voltage and change Max. limit, d) add note (2) to Input
Voltage Range, Open Loop Voltage Gain and Unity Gain Bandwidth under Error Amplifier, e) delete Power Supply Rejection parameter, f) add
Source and Sink Current parameters [with note (2)] under Error Amplifier, g) add note (2) to NDR-PDR Output Resistance (current source) and
change Max. limit, h) add note (2) to NDR-PDR Output Resistance (current sink) and change Typ. & Max. limits, i) change Max./Min. Overlap title
to “Maximum Overlap”, j) Maximum Overlap between Diagonal Switches Min. & Typ. limits, k) delete Gate Drive (A,B,C,D) Off Condition
parameter, l) Break-Before-Make PDR_A/NDR_B and PDR_C/NDR_D Min. & Max. limits, m) OVP test condition, Min. and Typ. limits; OZ976 - n)
Add notes (4) & (5), o) add note (4) to Reference Voltage-Nominal and change Min., Typ. & Max. limits, p) add note (5) to Reference Voltage-Line
Regulation and change Max. limit, q) add note (5) to Reference Voltage-Load Regulation and change Max. limit, r) add Source and Sink Current
parameters under Reference Voltage, s) delete CT Oscillator Initial Accuracy parameter, t) add note (5) to CT Oscillator Ramp Peak and Valley
and change Min. & Max. limits, u) CT Oscillator CLK Frequency Min., Typ. & Max limits, v) LCT Oscillator Initial Accuracy Min., Typ. & Max limits,
w) add note (5) to LCT Oscillator Ramp Peak and Valley and change Min. & Max. limits, x) Threshold ENA Min. & Max. limits, y) change Threshold
VIN title to “Threshold VINS” and change Min. & Max. limits, and z) add TALK parameter under Threshold; 6. Correct subtitle under item “15.” to
0read “VINS”; 7. Update the formulas for the operation frequency (under item “16.”) and internal LCT frequency (under item “18.”); and 8. Misc.
corrections.
51. Features & Gen’l Description--correct application lamp numbers; 2. Correct package type in part name in Ordering Information; 3. Update
0Functional Block Diagram; 4. Update OZ976 Typical Application Circuit; 5. OZ976 Pin Description--delete note ref. for pin #’s 38, 44 & 45; 6.
Complete ‘Package Power Dissipation’ value in Absolute Max. Ratings; 7. OZ972 Functional Specs a) replace ‘Input voltage range‘ parameter &
2limits with ‘Reference voltage at non-inverting input pin (internal)’ parameter & limits, b) correct ‘Max. Overlap between diagonal switches’ test
condition, c) correct Break-Before-Make ‘PDR_A/NDR_B’ test conditions, Typ & Max limits, and ‘PDR_C/NDR_D test conditions, Min & Max limits,
rd) correct ‘OVP’ Min, Typ & Max limits, e) correct ‘Supply Current’ test conditions, Typ & Max limits, f) correct ‘Supply current’ test conditions, Typ
e& Max limits, and g) ‘SST current’ Min, Typ & Max limits; 8. OZ976 Functional Specs a) add note (5) to CT Oscillator ‘Temp. stability’, and b)
correct ‘Supply Current’ test conditions; 9. Functional Description, 7, 6th line, correct voltage referenced; 10. Functional Description, 8, 1st line,
bcorrect voltage referenced; 11. Functional Description, correct voltage referenced in last line; 12. Functional Description, 18, correct Internal LCT
frequency formula; 13. Package Information, delete symbol ‘C’ in table; not included in the drawing; and 14. Misc. corrections.
m1. Add OZ972IG & OZ976IT packages and table that include temp range of each package in Ordering Information and General Description, 2.
Delete “I/O” columns in Pin Description tables, 3.Absolute Max. Ratings a) Modify table title, b) move note “(1)” from “VDDA, VDDA2, VDDD, VDD”
uto the table title, c) change “Logic Inputs” to read “Signal Inputs”, d) revise Resonator Frequency’, and e) add separate Operating Temp. table that
breaks out commercial and industrial temp ranges, 4. OZ972 Electrical Characteristics Revise a) table title, b) add temp range before the table, c)
Nfirst test condition at beginning of table, d) delete ‘Input offset voltage’ parameter, e) add test conditions and Min, Typ & Max limits for ‘Reference
lvoltage at non-inverting input pin’ and revise current Min, Typ & Max limits, f) delete ‘Open loop voltage gain’ and Unity gain bandwidth’
parameters, g) change ‘Source Current’ title to read ‘Output voltage’, add symbol and test condition, and revise Min, Typ, Max limits & units, h)
riadelete ‘Sink Current’ parameter, i) test conditions for ‘NDR-PDR Output’ parameters, adding Min, Typ, Max limits & units for new test conditions, j)
‘Break-Before-Make’ parameters Min, Typ & Max limits, k) add test condition plus Min, Typ, Max limits & unit to ‘Threshold OVP’ and update
current test conditions, Min, Typ & Max limits, and add ‘Talk’ parameter, l) ‘Supply current (ON)’ test conditions, m) ‘SST current Min, Typ & Max
elimits, and n) add ‘CTIMR current’ test conditions, adding Min, Typ, Max limits & units for new test conditions, and revising current Min, Typ & Max
limits, 5. OZ976 Electrical Characteristics Revise a) table title, b) add temp range before the table, c) first test condition at beginning of table, d)
Sadd ‘Nominal voltage’ test conditions, adding Min, Typ, Max limits & units for new test conditions, and revising current Min, Typ & Max limits, e)
‘Line regulation’ note numbers and Max limit, f) delete ‘Load regulation’, ‘Source Current’ and ‘Sink Current’, g) add test condition plus Min, Typ,
Max limits & unit to ‘CLK Frequency’ and update current test conditions, Min, Typ & Max limits, h) add test condition plus Min, Typ, Max limits &
unit to ‘Initial Accuracy’ and update current test conditions, Min, Typ & Max limits, i) delete ‘Ramp peak/valley’ parameters, j) add note (3) to ‘Low
Frequency PWM’, k) add symbol and test conditions (9) plus Min, Typ, Max limits & units to ‘Duty Cycle Range’ and update current Max limit, l)
’Threshold’ parameter names, deleting ‘ENA’ and VINS’, and all limits, m) add note (5) to ‘Talk’ parameter, n) ‘Supply current (low)’ Max lilmit, o)
‘Supply current (high)’ test condition and Max limit, and p) note (3), 6. OZ972 & OZ976 Functional Block Diagrams a) Revise ENA non-inverting
node voltage, SST current, and OVP threshold voltage, and b) delete phase shift in OZ976 diagram, 7. Functional Description a) Item 7., revise
voltage in line 6, b) Item 8., revise OVP threshold voltage in line 1, c) Item 11., revise non-inverting voltage in last line, and d) Item 18., update
formula, 8. Change C116 value to 33p in OZ976 Typical Application Circuit, 9. Add part numbers to titles of Package Information & 10. Misc.
Release
Date
10/21/02
04/23/03
05/13/03
01/27/04
OZ972/OZ976-DS-1.1
Page 0
Free Datasheet http://www.datasheetlist.com/




OZ976 pdf, 반도체, 판매, 대치품
OZ972/OZ976
OZ972 PIN DESCRIPTION
Name
VDD
REF
CT
CLK
TALK
ENA
CTIMR
SST
OVP
FB
CMP
GND
PDR_C
NDR_D
PDR_A
NDR_B
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Description
IC Power
Reference Voltage Input
Saw tooth wave with double inverter operating frequency
Square wave with inverter operating frequency
Strike/Normal/Shut Down indicator
Enable input; TTL signal – Active High
CCFL ignition period timer
Soft-start timer
Output voltage sense, Vth=2.0V
CCFL current feedback signal
Compensation output of the error amplifier
Ground
PMOSFET drive output
NMOSFET drive output
PMOSFET drive output
NMOSFET drive output
OZ976 PIN DESCRIPTION
Name
ENA_PP
VDDA2
VDDA
VDDD
OSCA
OSCY
VSYNC
TALK
L11
L10
L9
L8
L7
L6
L5
L4
L3
L2
L1
L0
GNDD
GNDA
GNDA2
REF
CLK
CT
POL
IND
ENA
RT
RT1
LCT
SEL1
SEL0
VDIM
VINS
NC
Pin No.
3
4
5
6
7
8
9
10
14
15
16
17
18
19
20
21
22
23
27
28
29
30
31
32
33
34
38
39
40
41
42
43
44
45
46
47
1, 2, 11, 12, 13,
24, 25, 26, 35,
36, 37, 48
Description
Enable OZ972
Analog Power
Analog Power
Digital Power
Connected to 4MHz Resonator
Connected to 4MHz Resonator
External synchronization input, TTL signal
rOZ972 feedback Ignition/Normal/Abnormal
eLow frequency PWM signal with x11 phase delay
bLow frequency PWM signal with x10 phase delay
Low frequency PWM signal with x9 phase delay
mLow frequency PWM signal with x8 phase delay
uLow frequency PWM signal with x7 phase delay
NLow frequency PWM signal with x6 phase delay
lLow frequency PWM signal with x5 phase delay
riaLow frequency PWM signal with x4 phase delay
Low frequency PWM signal with x3 phase delay
Low frequency PWM signal with x2 phase delay
eLow frequency PWM signal with x1 phase delay
SLow frequency PWM signal with no phase delay
2050
Digital Ground
Analog Ground
Analog Ground
Reference voltage output; 2.5V typical @ 100uA
Inverter operating clock
Timing capacitor set inverter operating frequency
POL(Polarity), Select dimming voltage polarity
IND(Individual), Select OZ972 system protection mode
Enable input; TTL signal
Timing resistor set operating frequency
Timing resistor for programming ignition frequency and PWM frequency
Timing capacitor set internal PWM frequency
Lamp number selector, work with SEL0
Lamp number selector, work with SEL1
A DC voltage for dimming control
Input voltage sense, Vth=1.5V
No Connection
Free Datasheet http://www.datasheetlist.com/

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OZ976 전자부품, 판매, 대치품
OZ972/OZ976
OZ976 ELECTRICAL CHARACTERISTICS
OZ976: 0oC < Tamb < 70oC, unless otherwise specified
OZ976I: -40oC < Tamb < 85oC, unless otherwise specified
Parameter
Symbol
Test Conditions
VDDA/VDDA2/VDDD = 5V;
unless otherwise specified
Limits
Min Typ Max
Unit
Reference Voltage
Nominal voltage (4)
Line regulation (2, 4)
REF
Tamb = 25oC; Iload = 0.25mA
Temp coefficient
VDDA = 4.7V – 5.3V
2.39 2.55 2.71
V
- 200 - ppm/oC
- 4 - mV/V
CT Oscillator
CLK Frequency
Tamb = 25oC;
CT = 220pF, RT = 48.7k(1)
Temp coefficient
58 63 68 KHz
- 200 - ppm/oC
LCT Oscillator
Initial accuracy
Low Frequency PWM (L0-L11) (3)
Duty Cycle Range
Tamb = 25oC;
LCT = 10nF, RT = 48.7k(2)
190 210 230
Hz
Temp coefficient
- -500 - ppm/oC
0VDIM = 1V; POL = 0V;
5VSYNC frequency = 70Hz;
0-0
20LCT = 10nF, RT = 48.7k(2)
rVDIM = 1.5V; POL = 0V;
eVSYNC frequency = 70Hz;
- 18 -
bLCT = 10nF, RT = 48.7k(2)
mVDIM = 3.2V; POL = 0V;
uVSYNC frequency = 70Hz;
- 70 -
l NLCT = 10nF, RT = 48.7k(2)
riaVDIM = 1V;POL = 0V;
VSYNC = GNDA;
0-0
SeLCT = 10nF, RT = 48.7k(2)
%
%
%
%
VDIM = 1.5V;POL = 0V;
L0-L11
VSYNC = GNDA;
- 50 -
%
LCT = 10nF, RT = 48.7k(2)
VDIM = 2.2V;POL = 0V;
VSYNC = GNDA;
100 - 100 %
LCT = 10nF, RT = 48.7k(2)
VDIM 3.2V; POL = 5V;
VSYNC = GNDA;
0-0 %
LCT = 10nF, RT = 48.7k(2)
VDIM = 2.5V; POL = 5V;
VSYNC = GNDA;
LCT = 10nF, RT = 48.7k(2)
- 50 -
%
VDIM 1.8V; POL = 5V;
VSYNC = GNDA;
100 - 100 %
LCT = 10nF, RT = 48.7k(2)
Free Datasheet http://www.datasheetlist.com/

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관련 데이터시트

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(OZ972 / OZ976) Intelligent CCFL Inverter Controller

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