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CSR8670 데이터시트 PDF




CSR에서 제조한 전자 부품 CSR8670은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 CSR8670 자료 제공

부품번호 CSR8670 기능
기능 Low-power Solution for DSP Intensive Audio Applications
제조업체 CSR
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CSR8670 데이터시트, 핀배열, 회로
Features
Bluetooth® v3.0 specification fully qualified
software
Bluetooth v4.0 specification compliant hardware
Radio includes integrated balun and RF
performance of 10dBm transmit power and
-90dBm receive sensitivity
80MHz RISC MCU and 80MIPS Kalimba DSP
16Mb internal flash memory (64-bit wide, 45ns);
optional support for 64Mb of external SPI flash
Stereo codec with 2 channels of ADC and up to 6
microphone inputs (includes bias generators and
digital microphone support)
Support for CSR's latest CVC technology for
narrow-band and wideband voice connections
including wind noise reduction
Audio interfaces: I²S, PCM and SPDIF
Serial interfaces: UART, USB 2.0 full-speed,
master and slave bit-serialiser (I²C and SPI)
Integrated dual switch-mode regulators, linear
regulators and battery charger
3 hardware LED controllers (for RGB) and ability
to drive LCD segment display directly
Support for up to 6 capacitive touch sensor inputs
6.5 x 6.5 x 1mm, 0.5mm pitch 112‑ball VFBGA
Green (RoHS compliant and no antimony or
halogenated flame retardants)
General Description
The BlueCore® CSR8670™ BGA consumer audio
platform for wired and wireless applications integrates
an ultra-low-power DSP and application processor
with embedded flash memory, a high-performance
stereo codec, a power management subsystem, LED
and LCD drivers and capacitive touch sensor inputs in
a SOC IC. The dual-core architecture with flash
memory enables manufacturers to easily differentiate
their products with new features without extending
development cycles.
CSR's popular BlueCore5-Multimedia® platform is
software-portable to the BlueCore® CSR8670™ BGA,
with easy migration of a broad range of solutions from
CSR's eXtension partners. This migration enables
rapid time-to-market deployment of a broad range of
consumer electronics products.
The enhanced Kalimba DSP coprocessor with
80MIPS supports enhanced audio and DSP
applications.
BlueCore® CSR8670™ BGA
Low-power Solution for
DSP Intensive Audio Applications
Production Information
CSR8670C
Issue 2
XTAL
Clock
Generation
Flash
RAM
External
Memory
Serial Flash
UART/USB
BT_RF
2. 4GHz
Radio
+
Balun
Baseband
I/O
PIO
LED /PO
Audio In /Out
PCM/I2S/
SPDIF
Audio
Interface
MCU
Kalimba
DSP
Capacitive
Sense
SPI /I2C
Applications
Home Entertainment Ecosystem
TVs
Smart remote controllers
Wired or wireless soundbars
Wired or wireless speakers and headphones
Tablets / PCs / Mobile Connectivity
Wearable audio (on-the-go)
Wearable audio with sensors (health and well-
being applications)
Wired or wireless stereo headphones for music/
gaming/multimedia content
Wired or wireless speakers
Wired or wireless speakerphones
Mono headsets for voice
The audio codec supports 2 ADC channels, up to 6
microphone inputs, stereo output and a variety of audio
standards.
See CSR Glossary at www.csrsupport.com.
Production Information
This material is subject to CSR's non-disclosure agreement
© Cambridge Silicon Radio Limited 2011
Page 1 of 116
CS-127997-DSP2
www.csr.com
Free Datasheet http://www.datasheetlist.com/




CSR8670 pdf, 반도체, 판매, 대치품
Document History
Revision Date
1 01 APR 11
2 30 JUN 11
Change Reason
Original publication of this document.
Production information added.
If you have any comments about this document, email [email protected] giving
number, title and section with your feedback.
Production Information
This material is subject to CSR's non-disclosure agreement
© Cambridge Silicon Radio Limited 2011
Page 4 of 116
CS-127997-DSP2
www.csr.com
Free Datasheet http://www.datasheetlist.com/

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CSR8670 전자부품, 판매, 대치품
7.3 Programming and Debug Interface ...................................................................................................... 34
7.3.1 Instruction Cycle ..................................................................................................................... 34
7.3.2 Multi-slave Operation ............................................................................................................. 34
7.3.3 SPI-lock and DFU Encryption ................................................................................................ 35
7.4 Bit-serialiser Interface .......................................................................................................................... 35
7.5 I²C Interface ......................................................................................................................................... 35
8 Interfaces ...................................................................................................................................................... 36
8.1 Programmable I/O Ports, PIO .............................................................................................................. 36
8.1.1 LCD Segment Driver .............................................................................................................. 36
8.2 Analogue I/O Ports, AIO ...................................................................................................................... 36
8.3 Capacitive Touch Sensor ..................................................................................................................... 37
8.4 LED Drivers ......................................................................................................................................... 39
9 Audio Interface .............................................................................................................................................. 40
9.1 Audio Input and Output ........................................................................................................................ 41
9.2 Audio Codec Interface ......................................................................................................................... 41
9.2.1 Audio Codec Block Diagram .................................................................................................. 42
9.2.2 Codec Set-up ......................................................................................................................... 42
9.2.3 ADC ........................................................................................................................................ 43
9.2.4 ADC Sample Rate Selection .................................................................................................. 43
9.2.5 ADC Audio Input Gain ............................................................................................................ 43
9.2.6 ADC Pre-amplifier and ADC Analogue Gain .......................................................................... 43
9.2.7 ADC Digital Gain .................................................................................................................... 44
9.2.8 ADC Digital IIR Filter .............................................................................................................. 44
9.2.9 DAC ........................................................................................................................................ 44
9.2.10 DAC Sample Rate Selection .................................................................................................. 44
9.2.11 DAC Digital Gain .................................................................................................................... 45
9.2.12 DAC Analogue Gain ............................................................................................................... 45
9.2.13 DAC Digital FIR Filter ............................................................................................................. 46
9.2.14 IEC 60958 Interface ............................................................................................................... 46
9.2.15 Microphone Input ................................................................................................................... 47
9.2.16 Digital Microphone Inputs ....................................................................................................... 48
9.2.17 Line Input ............................................................................................................................... 49
9.2.18 Output Stage .......................................................................................................................... 50
9.2.19 Mono Operation ..................................................................................................................... 50
9.2.20 Side Tone ............................................................................................................................... 51
9.2.21 Integrated Digital IIR Filter ..................................................................................................... 52
9.3 PCM Interface ...................................................................................................................................... 53
9.3.1 PCM Interface Master/Slave .................................................................................................. 54
9.3.2 Long Frame Sync ................................................................................................................... 54
9.3.3 Short Frame Sync .................................................................................................................. 55
9.3.4 Multi-slot Operation ................................................................................................................ 55
9.3.5 GCI Interface .......................................................................................................................... 56
9.3.6 Slots and Sample Formats ..................................................................................................... 56
9.3.7 Additional Features ................................................................................................................ 57
9.3.8 PCM Timing Information ........................................................................................................ 58
9.3.9 PCM_CLK and PCM_SYNC Generation ................................................................................ 61
9.3.10 PCM Configuration ................................................................................................................. 62
Production Information
This material is subject to CSR's non-disclosure agreement
© Cambridge Silicon Radio Limited 2011
Page 7 of 116
CS-127997-DSP2
www.csr.com
Free Datasheet http://www.datasheetlist.com/

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Low-power Solution for DSP Intensive Audio Applications

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