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RT3050 PDF 데이터시트 ( Data , Function )

부품번호 RT3050 기능
기능 (RT3050 / RT3052) high performance 384MHz MIPS24KEc CPU core
제조업체 Ralink
로고 Ralink 로고 



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RT3050 데이터시트, 핀배열, 회로
Application
802.11 b/g/n AP/Router
Dual Band Concurrent Router
NAS
• iNIC
RT3050/52
Datasheet
Preliminary
Revision August 14, 2008
The RT3052 SOC combines Ralink’s 802.11n draft
compliant 2T2R MAC/BBP/RF, a high performance
384MHz MIPS24KEc CPU core, 5-port integrated
10/100 Ethernet switch/PHY, an USB OTG and a
Gigabit Ethernet MAC. With the RT3052, there are
very few external components required for 2.4GHz
11n wireless products. The RT3052 employs Ralink
2nd generation 11n technologies for longer range and
better throughput. The embedded high performance
CPU can process advanced applications effortlessly,
such as routing, security and VOIP. The USB por t can
be configured to access external storage for Digital
Home applications. In addition, the RT3052 has rich
hardware interfaces (SPI/I2S/I2C/UART/GMAC) to
enable many possible applications.
Support 16/32-bit SDR SDRAM (up-to 64M bytes)
SDRAM data [31:16] sre pins shared with GPIO
Support boot from 8/16-bit parallel NOR type Flash
(up-to 16M bytes))
Support boot from NAND type Flash (up-to 64 M bytes)
Support boot from ROM iNIC mode
USB2.0 OTG x 1
Embedded a 7-port Ethernet switch and a 5 port
10/100Mbps PHY
Support 5 10/100 UTP ports and one RGMII/MII port for
RT3052 only
Hardware NAT, QoS, TCP/UDP/IP Checksum offloading
Slow speed I/O : GPIO, I2C, SPI, UART, MDC/MDIO,
JTAG,PCM and I2S
Package and I/O voltage
14mm x 14mm TFBGA-289 Package
I/O : 3.3V/2.5V(RGMII), 3.3v I/O
Features
Embedded 2 T2R 2.4G CMOS RF
Embedded 802.11n 2T2R MAC/BBP w/MLD
enhancement
300Mbps PHY data rate
1x1/1x2/2x2 modes
20Mhz/40Mhz channel width
Legacy and high throughout modes
Reverse Data Grant (RDG) support
Compressed Block ACK
Up to 256 clients
Multiple BSSID (up to 8)
WEP64/128, WPA, WPA2 engines
QOS - WMM, WMM Power Save
Hardware frame aggregation
International Regulation - 802.11h TPC
MIPS 24KEc 384Mhz with 32KB I cache/16KB D
cache
Order Information
Part Number Temp Range Package
RT3050F -10~550C Green/ RoHS Compliant
TFBGA 289 ball
RT3052F
-10~55 0C
(14mmx14mm)
Green/ RoHS Compliant
TFBGA 289 ball
(14mmx14mm)
Ralink Technology, Corp. (Taiwan)
5th F. No. 36,Taiyuan St, Jhubei City, Hsin-Chu, Taiwan,
R.O.C.
Tel: 886-3-560-0868 Fax: 886-3-560-0818
Ralink Technology, Corp. (USA)
20833 Stevens Creek Blvd., Suite 200 Cupertino, CA95014
Tel: (408) 725-8070 Fax: (408)725-8069
h ttp ://www.ralink te ch .co m
Comparison Table
Feature
Package
Dimension
Balls
CPU
Cache
SDRAM
NOR Flash
NAND Flash
RGMII
USB 2.0
TxRx
Band
Power Consumption
RT3050F
TFBGA
14mmx14mm
289
320 MHz
16K I-Cache + 16K D-Cache
16 bit (32MB)
8/16 bit (16MB*2)
8bit (32MB)
NO
YES
1x1
2.4 GHz
1.9W
Device
RT3052F
TFBGA
14mmx14mm
289
320/384 MHz
32K I-Cache + 16K D-Cache
16/32 bit (64MB)
8/16 bit (16MB*2)
8bit (32MB)
YES
YES
2x2
2.4 GHz
2.3W
DSR3050/52_V.2.0_081408
Form No.QS-073-F02
Rev.1
Kept byDCC
-1-
Ret. T ime5 Years
Free Datasheet http://www.datasheetlist.com/




RT3050 pdf, 반도체, 판매, 대치품
RT3050/52
Datasheet
Preliminary
Revision August 14, 2008
3.8 UART Lite ................................................................................................................52
3.8.1 Features .............................................................................................................52
3.8.2 Block Diagram.....................................................................................................52
3.8.3 Register Description (base: 0x1000.0C00) .............................................................52
3.9 Programmable I/O...................................................................................................57
3.9.1 Features .............................................................................................................57
3.9.2 Block Diagram.....................................................................................................57
3.9.3 Register Description (base: 0x1000.0600) .............................................................57
3.10 I2C Controller..........................................................................................................64
3.10.1 Features............................................................................................................64
3.10.2 Block Diagram ...................................................................................................64
3.10.3 Register Description (base: 0x1000.0900) ...........................................................64
3.11 SPI Controller ..........................................................................................................68
3.11.1 Features............................................................................................................68
3.11.2 Block Diagram ...................................................................................................68
3.11.3 Register Description (base: 0x1000.0B00) ...........................................................68
3.12 Generic DMA Controller...........................................................................................71
3.12.1 Features............................................................................................................71
3.12.2 Block Diagram ...................................................................................................71
3.12.3 Register Description (base: 0x10000700) ............................................................71
3.13 PCM Controller........................................................................................................75
3.13.1 Features............................................................................................................75
3.13.2 Block Diagram ...................................................................................................75
3.13.3 Register Description (base: 0x1000.0400) ...........................................................76
3.14 I2S Controller ..........................................................................................................80
3.14.1 Features............................................................................................................80
3.14.2 Block Diagram ...................................................................................................80
3.14.3 Register Description (base: 0x1000.0A00) ...........................................................81
3.15 Memory Controller..................................................................................................83
3.15.1 Features............................................................................................................83
3.15.2 Block Diagram ...................................................................................................83
3.15.3 Register Description (base: 0x1000.0300) ...........................................................83
3.16 NAND Flash Controller.............................................................................................88
3.16.1 Features............................................................................................................88
3.16.2 Block Diagram ...................................................................................................88
3.16.3 Register Description (base: 0x1000.0800) ...........................................................88
3.17 Frame Engine ..........................................................................................................91
3.17.1 Features............................................................................................................91
3.17.2 Block Diagram ...................................................................................................92
3.17.3 Register Description (base: 0x1010.0000) ...........................................................95
3.18 Ethernet Switch.....................................................................................................111
DSR3050/52_V.2.0_081408
Form No.QS-073-F02
Rev.1
Kept byDCC
-4-
Ret. T ime5 Years
Free Datasheet http://www.datasheetlist.com/

4페이지










RT3050 전자부품, 판매, 대치품
1. Pin Description
RT3050/52
Datasheet
Preliminary
Revision August 14, 2008
1.1 289-Pins BGA Package Diagram
1.1.1 289-Pins BGA Package Diagram for RT3050F
Top view (left portion)
1 23 4
5 6 789
A
RF0_V12A
RF0_2G_OUTP RF0_2G_INN
RF0_2G_INP
PLL_VC_CAP BG_RES_12K LDORF_OUT_V12RF_BB2_V12A ADC_VREFN
B NC
GND
RF_BB1_V12A VCO_VCO_V12A PLL_DIV_V12A LDOPLL_OUT_V12 LDORF_IN_VX RF0_TSSI_IN ADC_V12A
C NC
RF1_V12A
GND
VCO_LO_V12A PLL_PRE_V12A
PLL_X1
PLL_X2 BASE_TRX_IP BASE_TRX_QN
D NC
RF0_PA_PE RF0_LO_V12A
GND
GND
BG_V33A
NC BASE_TRX_IN BASE_TRX_QP
E NC
RF_V33A
NC
GND
GND
GND
GND
GND
GND
F DSR_N
TXD
ANT_TRN
WLAN_LED_N
GND
GND
GND
GND
GND
G CTS_N
RTS_N
TXD2
ANT_TRNB
GND
GND
GND
GND
GND
H UPHY_VDDA_V33A UPHY_VRES
DCD_N
RXD2
SOC_CO_V12D
GND
GND
GND
GND
J UPHY_PADP UPHY_PADM
RXD
DTR_N
SOC_IO_V33D
GND
GND
GND
GND
K NC
NC UPHY_VBUS
RIN
GND
GND
GND
GND
GND
L NC
NC
UPHY_ID UPHY_VDDL_V12D SOC_CO_V12D
GND
GND
GND
GND
M NC
NC
NC SOC_CO_V12D
NC RGMII_IO_V33D RGMII_IO_V33D GND
GND
N NC
NC NC RGMII_IO_V33D RGMII_IO_V33D EPHY_V33A EPHY_V33A EPHY_V33A EPHY_V33A
P NC
NC NC EPHY_REF_RES EPHY_LED3_N EPHY_LED4_N EPHY_LED0_N EPHY_V33A EPHY_V33A
R EPHY_RXN_p0 EPHY_RXP_p0 EPHY_TXP_p1 EPHY_TXN_p1 EPHY_TXP_p3 EPHY_TXN_p3 EPHY_LED1_N EPHY_LED2_N SPI_DIN
T EPHY_TXN_p0 EPHY_RXP_p1 EPHY_RXN_p2 EPHY_TXN_p2 EPHY_RXP_p3 EPHY_RXN_p4 EPHY_TXN_p4 PORST_N
SPI_CLK
U EPHY_TXP_p0 EPHY_RXN_p1 EPHY_RXP_p2 EPHY_TXP_p2 EPHY_RXN_p3 EPHY_RXP_p4 EPHY_TXP_p4 SPI_DOUT
SPI_EN
Top view (right portion)
10 11 12 13 14 15 16 17
ADC_VREFP ADC_VREF025P ADC_VREF LDODIG_OUT_V12 SRAM_CS_N
MA20
MD1
MD6
ADC_V12D ADC_VREF025N
NC
OE_N
FLASH_CS_N
MD0
MD5
MD4
RF0_LNA_PE LDOADC_IN_VX LDODIG_IN_VX
WE_N
MA21
MD3
MD8
MD9
GND
LDOADC_OUT_V12 LDO_V33A
MA22
SOC_CO_V12D
MD2
MD10
MD13
GND
GND
GND
SOC_IO_V33D SOC_CO_V12D
MD7
MD14
MD15
GND
GND
GND
GND
SOC_CO_V12D
MD11
MA3
MA2
GND
GND
GND
GND
SOC_CO_V12D
MD12
MA1
BPLL_VDD_V12D
GND
GND
GND
GND
SOC_IO_V33D
MA4
MA0
BPLL_POC_V33D
GND
GND
GND
GND
SOC_IO_V33D BPLL_DVDD_V12D BPLL_DVDDA_V12D BPLL_AVDD_V12A
GND
GND
GND
GND
SOC_IO_V33D
MA5
MA7
MA6
GND
GND
GND
GND
SOC_IO_V33D SOC_CO_V12D
MA9
MA8
GND
GND
GND
SOC_IO_V33D SOC_IO_V33D
MA15
MA11
MA10
SOC_IO_V33D SOC_IO_V33D SOC_IO_V33D SOC_IO_V33D
NC
MA19
MA13
MA14
SOC_CO_V12D SOC_CO_V12D
NC
NC NC
NC
MA18
MA12
I2C_SCLK
JTAG_TDO
NC
NC NC
NC
SDRAM_CLK
MA17
I2C_SD
JTAG_TDI
JTAG_TRST_N
NC
NC
NC
SDRAM_RAS_N
MA16
GPIO0
JTAG_TMS
JTAG_TCLK
NC
NC
NC
NC SDRAM_CS_N
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
DSR3050/52_V.2.0_081408
Form No.QS-073-F02
Rev.1
Kept byDCC
-7-
Ret. T ime5 Years
Free Datasheet http://www.datasheetlist.com/

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관련 데이터시트

부품번호상세설명 및 기능제조사
RT3050

(RT3050 / RT3052) high performance 384MHz MIPS24KEc CPU core

Ralink
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RT3050F

(RT3050 / RT3052) high performance 384MHz MIPS24KEc CPU core

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