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AD7451 데이터시트 PDF




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부품번호 AD7451 기능
기능 (AD7451 / AD7441) 12- & 10-Bit ADCs
제조업체 Analog Devices
로고 Analog Devices 로고


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AD7451 데이터시트, 핀배열, 회로
PRELIMINARY TECHNICAL DATA
a
Pseudo Differential, 1MSPS,
12- & 10-Bit ADCs in 8-lead SOT-23
Preliminary Technical Data
AD7451/AD7441
FEATURES
Fast Throughput Rate: 1MSPS
Specified for VDD of 2.7 V to 5.25 V
Low Power at max Throughput Rate:
3.75 mW typ at 1MSPS with VDD = 3 V
9 mW typ at 1MSPS with VDD = 5 V
Pseudo Differential Analog Input
Wide Input Bandwidth:
70dB SINAD at 300kHz Input Frequency
Flexible Power/Serial Clock Speed Management
No Pipeline Delays
High Speed Serial Interface - SPITM/QSPITM/
MICROWIRETM/ DSP Compatible
Power-Down Mode: 1µA max
8 Pin SOT-23 and µSOIC Packages
APPLICATIONS
Transducer Interface
Battery Powered Systems
Data Acquisition Systems
Portable Instrumentation
Motor Control
Communications
GENERAL DESCRIPTION
The AD7451/AD7441 are respectively 12- and 10-bit,
high speed, low power, successive-approximation (SAR)
analog-to-digital converters that feature a pseudo differen-
tial analog input. These parts operate from a single 2.7 V
to 5.25 V power supply and feature throughput rates up to
1MSPS.
The parts contains a low-noise, wide bandwidth, differen-
tial track and hold amplifier (T/H) which can handle
input frequencies in excess of 1MHz with the -3dB point
being 20MHz typically. The reference voltage is 2.5 V
and is applied externally to the VREF pin.
The conversion process and data acquisition are controlled
using CS and the serial clock allowing the device to inter-
face with Microprocessors or DSPs. The input signals are
sampled on the falling edge of CS and the conversion is
also initiated at this point.
The SAR architecture of these parts ensures that there are
no pipeline delays.
FUNCTIONAL BLOCK DIAGRAM
VDD
VIN+
VIN-
VREF
T/H
12-BIT SUCCESSIVE
APPROXIMATION
ADC
AD7451/
AD7441
CONTROL
LOGIC
SCLK
SDATA
+5
GND
The AD7451/41 use advanced design techniques to achieve
very low power dissipation at high throughput rates.
PRODUCT HIGHLIGHTS
1.Operation with 2.7 V to 5.25 V power supplies.
2.High Throughput with Low Power Consumption.
With a 3V supply, the AD7451/41 offer 3.75mW typ
power consumption for 1MSPS throughput.
3.Pseudo Differential Analog Input.
The VIN- input can be used as an offset from ground
4.Flexible Power/Serial Clock Speed Management.
The conversion rate is determined by the serial clock,
allowing the power to be reduced as the conversion time
is reduced through the serial clock speed increase. These
parts also feature a shutdown mode to maximize power
efficiency at lower throughput rates.
5.No Pipeline Delay.
6.Accurate control of the sampling instant via a CS input
and once off conversion control.
MICROWIRE is a trademark of National Semiconductor Corporation.
SPI and QSPI are trademarks of Motorola, Inc.
REV. PrC 24/05/02
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002
Free Datasheet http://www.Datasheet4U.com




AD7451 pdf, 반도체, 판매, 대치품
PRELIMINARY TECHNICAL DATA
AD7441-SPECIFICATIONS1
( VDD = 2.7V to 5.25V, fSCLK = 18MHz, fS = 1MHz, VREF = 2.5 V; FIN = 300kHz;
TA = TMIN to TMAX, unless otherwise noted.)
Parameter
DYNAMIC PERFORMANCE
Signal to (Noise + Distortion)
(SINAD)2
Total Harmonic Distortion (THD)2
Peak Harmonic or Spurious Noise2
Intermodulation Distortion (IMD)2
Second Order Terms
Third Order Terms
Aperture Delay2
Aperture Jitter2
Full Power Bandwidth2
DC ACCURACY
Resolution
Integral Nonlinearity (INL)2
Differential Nonlinearity (DNL)2
Offset Error2
Gain Error2
ANALOG INPUT
Full Scale Input Span
Absolute Input Voltage
VIN+
V
I
N
3
-
DC Leakage Current
Input Capacitance
REFERENCE INPUT
VREF Input Voltage
DC Leakage Current
VREF Input Capacitance
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN4
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance4
Output Coding
Test Conditions/Comments
-80dB typ
-82dB typ
@ -3 dB
@ -0.1 dB
Guaranteed No Missed Codes
to 10 Bits.
VIN+ - VIN-
When in Track
When in Hold
±1% tolerance
for specified performance
Typically 10nA, VIN = 0VorVDD
VDD = 5V; ISOURCE = 200µA
VDD = 3V; ISOURCE = 200µA
ISINK =200µA
B Version1
61
-73
-73
-78
-78
10
50
20
2.5
10
±0.5
±0.5
±3
±3
VREF
VREF
0.1 to 1
±1
20
6
2.5
±1
15
2.4
0.8
±1
10
2.8
2.4
0.4
±1
10
Straight
(Natural)
Binary
Unit
dB min
dB max
dB max
dB typ
dB typ
ns typ
ps typ
MHz typ
MHz typ
Bits
LSB max
LSB max
LSB max
LSB max
V
V
V
µA max
pF typ
pF typ
V
µA max
pF typ
V min
V max
µA max
pF max
V min
V min
V max
µA max
pF max
–4–
REV. PrC
Free Datasheet http://www.Datasheet4U.com

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AD7451 전자부품, 판매, 대치품
PRELIMINARY TECHNICAL DATA
AD7451/AD7441
ABSOLUTE MAXIMUM RATINGS1
(TA = +25°C unless otherwise noted)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +7 V
VIN+ to GND . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
VIN- to GND . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
Digital Input Voltage to GND . . . . . . . . -0.3 V to +7 V
Digital Output Voltage to GND . -0.3 V to VDD + 0.3 V
VREF to GND . . . . . . . . . . . . . . . . . -0.3 V to VDD +0.3 V
Input Current to Any Pin Except Supplies2 . . . . ±10mA
Operating Temperature Range
Commercial (A, B Version) . . . . . . . . . -40oC to +85oC
Storage Temperature Range . . . . . . . . . -65oC to +150oC
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . +150oC
JA Thermal Impedance . . . . . . . . . . 205.9°C/W (µSOIC)
211.5°C/W (SOT-23)
JC Thermal Impedance . . . . . . . . . 43.74°C/W (µSOIC)
91.99°C/W (SOT-23)
Lead Temperature, Soldering
Vapor Phase (60 secs) . . . . . . . . . . . . . . . . . . . +215oC
Infared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . +220oC
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.5kV
TO
OUT PUT
PIN
CL
50pF
IO L
1.6mA
+1.6V
IO H
200µA
Figure 3. Load Circuit for Digital Output Timing
Specifications
NOTES
1Stresses above those listed under “Absolute Maximum Ratings” may cause permanent
damage to the device. This is a stress rating only and functional operation of the device
at these or any other conditions above those listed in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
2Transient currents of up to 100 mA will not cause SCR latch up.
Model
AD7451BRT
AD7451BRM
AD7441BRT
AD7441BRM
TBD
EVAL-CONTROL BRD23
ORDERING GUIDE
Range
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
Evaluation Board
Controller Board
Linearity
Error (LSB)1
±1 LSB
±1 LSB
±0.5 LSB
±0.5 LSB
Package
Option4
RT-8
RM-8
RT-8
RM-8
Branding Information
TBD
TBD
TBD
TBD
NOTES
1Linearity error here refers to Integral Non-linearity Error.
2This can be used as a stand-alone evaluation board or in conjunction with the EVALUATION BOARD CONTROLLER for evaluation/demonstration purposes.
3EVALUATION BOARD CONTROLLER. This board is a complete unit allowing a PC to control and communicate with all Analog Devices
evaluation boards ending in the CB designators. To order a complete Evaluation Kit, you will need to order the ADC evaluation board i.e.
TBD, the EVAL-CONTROL BRD2 and a 12V AC transformer. See the TBD technote for more information.
4RT = SOT-23; RM = µSOIC
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V
readily accumulate on the human body and test equipment and can discharge without
detection. Although the AD7451/AD7441 features proprietary ESD protection circuitry,
permanent damage may occur on devices subjected to high-energy electrostatic
discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
REV. PrC
–7–
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