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PDF L6743Q Data sheet ( Hoja de datos )
| Número de pieza | L6743Q | |
| Descripción | High current MOSFET driver | |
| Fabricantes | STMicroelectronics | |
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L6743
L6743Q
High current MOSFET driver
Features
■ Dual MOSFET driver for synchronous rectified
converters
■ High driving current for fast external MOSFET
switching
■ Integrated bootstrap diode
■ High frequency operation
■ Enable pin
■ Adaptive dead-time management
■ Flexible gate-drive: 5V to 12V compatible
■ High-impedance (HiZ) management for output
stage Shutdown
■ Preliminary OV protection
■ SO-8 and DFN10 3x3 packages
Applications
■ High current VRM / VRD for Desktop / Server /
Workstation CPUs
■ High current and high efficiency DC / DC
converters
Description
L6743, L6743Q is a flexible, high-frequency dual-
driver specifically designed to drive N-channel
MOSFETs connected in Synchronous-Rectified
Buck topology.
SO-8
DFN10 3x3
Combined with ST PWM Controllers, the driver
allows implementing complete voltage regulator
solutions for modern high-current CPUs and
DCDC conversion in general. L6743, L6743Q
embeds high-current drivers for both high-side
and low-side MOSFETS. The device accepts
flexible power supply (5V to 12V) to optimize the
gate-drive voltage for High-Side and Low-Side
maximizing the System Efficiency.
The Bootstrap diode is embedded saving the use
of external diodes. Anti shoot-through
management avoids high-side and low-side
mosfet to conduct simultaneously and, combined
with Adaptive Dead-Time control, minimizes the
LS body diode conduction time.
L6743, L6743Q embeds Preliminary OV
Protection: after Vcc overcomes the UVLO and
while the device is in HiZ, the LS MOSFET is
turned ON to protect the load in case the output
voltage overcomes a warning threshold protecting
the output against HS failures.
The driver is available is SO8 and DFN10 3x3
packages
Table 1.
Device summary
Order code
L6743
L6743TR
L6743Q
L6743QTR
August 2007
Package
SO-8
SO-8
DFN10
DFN10
Rev 1
Packaging
Tube
Tape & Reel
Tube
Tape & Reel
1/17
www.st.com
1
Free Datasheet http://www.Datasheet4U.com
1 page  
L6743, L6743Q
3 Thermal data
Thermal data
Table 3. Thermal data
Symbol
Parameter
RthJA
RTHJC
TMAX
TSTG
TJ
PTOT
Thermal resistance junction to ambient
(Device soldered on 2s2p, 67mm x 69mm board)
Thermal resistance junction to case
Maximum junction temperature
Storage temperature range
Junction temperature range
Maximum power dissipation at 25°C
(Device soldered on 2s2p PC Board)
Value
SO8
DFN10
Unit
85 45
-5
150
0 to 150
0 to 125
1.15 2.25
°C/W
°C/W
°C
°C
°C
W
4 Electrical specifications
4.1
Absolute maximum ratings
Table 4. Absolute maximum ratings
Symbol
Parameter
VCC,VPVCC
VBOOT, VUGATE
VPHASE
VLGATE
VPWM, VEN
VCC,VPVCC
to GND
to GND
to PHASE
to GND
to GND
to GND
to GND
Value
-0.3 to 15
41
15
-8 to 26
-0.3 to VCC + 0.3
-0.3 to 7
-0.3 to 15
Unit
V
V
V
V
V
V
5/17
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5 Page 
L6743, L6743Q
Device description and operation
5.5 Layout guidelines
L6743, L6743Q provides driving capability to implement high-current step-down DC-DC
converters.
The first priority when placing components for these applications has to be reserved to the
power section, minimizing the length of each connection and loop as much as possible. To
minimize noise and voltage spikes (also EMI and losses) power connections must be a part
of a power plane and anyway realized by wide and thick copper traces: loop must be anyway
minimized. The critical components, such as the power MOSFETs, must be close one to the
other. However, some space between the power MOSFET is still required to assure good
thermal cooling and airflow.
Traces between the driver and the MOSFETS should be short and wide to minimize the
inductance of the trace so minimizing ringing in the driving signals. Moreover, VIAs count
needs to be minimized to reduce the related parasitic effect.
The use of multi-layer printed circuit board is recommended.
Small signal components and connections to critical nodes of the application as well as
bypass capacitors for the device supply are also important. Locate the bypass capacitor
(VCC, PVCC and BOOT capacitors) close to the device with the shortest possible loop and
use wide copper traces to minimize parasitic inductance.
Systems that do not use Schottky diodes in parallel to the Low-Side MOSFET might show
big negative spikes on the phase pin. This spike can be limited as well as the positive spike
but has an additional consequence: it causes the bootstrap capacitor to be over-charged.
This extra-charge can cause, in the worst case condition of maximum input voltage and
during particular transients, that boot-to-phase voltage overcomes the abs.max.ratings also
causing device failures. It is then suggested in this cases to limit this extra-charge by adding
a small resistor RBOOT in series to the boot capacitor. The use of RBOOT also contributes in
the limitation of the spike present on the BOOT pin.
For heat dissipation, place copper area under the IC. This copper area may be connected
with internal copper layers through several VIAs to improve the thermal conductivity. The
combination of copper pad, copper plane and VIAs under the driver allows the device to
reach its best thermal performances.
Figure 7. Driver turn-on and turn-off paths
VCC
VCC
RBOOT
LGATE
CBOOT
CGD
RGATE RINT
CGS
GND
LS DRIVER
LS MOSFET
CDS
BOOT
RBOOT
HGATE
CBOOT
CGD
RGATE RINT
CGS
PHASE
HS DRIVER
HS MOSFET
CDS
11/17
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11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet L6743Q.PDF ] | |
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