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Número de pieza | TTP229 | |
Descripción | 16 KEYS OR 8 KEYS TOUCH PAD DETECTOR IC | |
Fabricantes | TONTEK | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de TTP229 (archivo pdf) en la parte inferior de esta página. Total 19 Páginas | ||
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TTP229
TonTouchTM
16 KEYS OR 8 KEYS TOUCH PAD DETECTOR IC
GENERAL DESCRIPTION
The TTP229 TonTouchTM IC is capacitive sensing design specifically for touch pad controls. The
device built in regulator for touch sensor. Stable sensing method can cover diversity conditions. Human
interfaces control panel links through non-conductive dielectric material. The main application is
focused at replacing of the mechanical switch or button. The ASSP can independently handle the 8
touch pads or up to 16 touch pads.
FEATURES
Operating voltage:2.4V~5.5V for built-in regulator enable
2.0V~5.5V for built-in regulator disable
Built-in regulator with external enable/disable option
Stand-by current
At 3V, and sleep mode slow sampling rate 8Hz:
Internal regulator is enabled, the Stand-by current
=> Typical 2.5uA for 16 input keys
=> Typical 2.0uA for 8 input keys
Internal regulator is disabled, the Stand-by current
=> Typical 2.5uA for 16 input keys
=> Typical 2.0uA for 8 input keys
Provides to set 8 direct keys or 16 direct keys by option
Provides to set 8 separate outputs only for 8 direct input keys mode
Has two kinds of serial output interface, both can use for 8 and 16 direct input keys mode
Include 2-wires serial interface and I2C-bus slave interface, they are selected by option
8 separate outputs can select output driving types by option
(CMOS/OD/OC with active high/low)
2-wires serial interface can select active high or low by option
Offer multi-key or single-key feature by option
Provides two kinds of sampling rate that slow sampling rate 8Hz
and fast sampling rate 64Hz at sleep mode
Have the maximum key-on time about 60sec by pin option
Sensitivity can adjust by the capacitance(1~50pF) outside
After power-on have about 0.5sec stable-time,
During the time do not touch the key pad, and all functions are disabled
Auto calibration for environment changing
And the re-calibration period is about 4.0sec, when all keys are not activated for fixed time
APPLICATION
Wide consumer products
Button key replacement
09’/10/30
Page 1 of 19
Ver : 1.0
1 page PAD’s DIAGRAM
Preliminary
TTP229
TonTouchTM
CHIP SIZE:1700um x 1820um
Substrate floating (recommend) or VSS
PAD’s COORDINATE
Pad NO. Pad Name
X
1 TP15
-750.00
2 TP14
-750.00
3 SENADJ3 -750.00
4 TP13
-750.00
5 TP12
-750.00
6 SDA
-539.90
7 SDO
-424.90
8 SCL
-309.90
9 SLPSENB -194.90
10 TP11
-79.90
11 TP10
35.10
12 SENADJ2 150.10
13 TP9
265.10
14 TP8
380.10
15 TEST
495.10
16 A2
750.00
17 A1
750.00
18 A0
750.00
Y
95.15
-28.85
-369.50
-493.50
-617.50
-810.00
-810.00
-810.00
-810.00
-810.00
-810.00
-810.00
-810.00
-810.00
-810.00
-686.35
-569.35
-452.35
Pad NO.
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
Pad Name
SLSERT
TP7
TP6
SENADJ1
TP5
TP4
VDD
VREG
ENSLP
VSS
REGEN
SLPSENA
TP3
TP2
SENADJ0
TP1
TP0
X
750.00
750.00
750.00
750.00
750.00
750.00
675.85
558.85
421.15
304.15
187.15
-460.85
-577.85
-750.00
-750.00
-750.00
-750.00
Y
-335.35
-218.35
-101.35
15.65
438.60
555.60
810.00
810.00
810.00
810.00
810.00
810.00
810.00
591.15
467.15
343.15
219.15
09’/10/30
Page 5 of 19
Ver : 1.0
5 Page Start
Slave Address
Preliminary
Data_0
TTP229
TonTouchTM
Data_1
Stop
Start
A2 A1 A0 R B7 B6 B5 B4 B3 B2 B1 B0 B7 B6 B5 B4 B3 B2 B1 B0
Slave Address
ACK
from slave
ACK
from master
For 16 input keys mode
Data_0
Stop
NOT ACK
from master
A2 A1 A0 R B7 B6 B5 B4 B3 B2 B1 B0
ACK
from slave
NOT ACK
from master
For 8 input keys mode
Note : Data_0 : B7~B0 is TP0~TP7 on/off status. 0 is key off, 1 is key on.
Data_1 : B7~B0 is TP8~TP15 on/off status. 0 is key off, 1 is key on.
Figure 3-5-1. Read Operation Sequence
SDA
SCL
S
START
Condition
Data or Data
ACK Valid Change
Figure 3-5-2. Data Transmission Sequence
P
STOP condition
SDA
SCL
1-7
S
START
Condition
ADDRESS
8
R/W
9
ACK
1-7
89
DATA
ACK
1-7
8
DATA
9
ACK
P
STOP
Condition
Figure 3-5-3. A complete data transfer
SDA
tf
SCL
S
tLOW tr
t SU;DAT
tf
t HD;STA
tr tBUF
t HD;STA
t HD;DAT
t HIGH
tSU;STA Sr
t PSU;STO
Figure 3-5-4. Definition of timing for F/S-mode devices on the I2C-bus
S
09’/10/30
Page 11 of 19
Ver : 1.0
11 Page |
Páginas | Total 19 Páginas | |
PDF Descargar | [ Datasheet TTP229.PDF ] |
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