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A4953 데이터시트 PDF




Allegro에서 제조한 전자 부품 A4953은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


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부품번호 A4953 기능
기능 (A4952 / A4953) Full-Bridge DMOS PWM Motor Drivers
제조업체 Allegro
로고 Allegro 로고


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A4953 데이터시트, 핀배열, 회로
A4952 and A4953
Full-Bridge DMOS PWM Motor Drivers
Features and Benefits
• Low RDS(on) outputs
• Overcurrent protection (OCP)
Motor short protection
Motor lead short to ground protection
Motor lead short to battery protection
• Low Power Standby mode
• Adjustable PWM current limit
• Synchronous rectification
• Internal undervoltage lockout (UVLO)
• Crossover-current protection
• Fault output (A4952 only)
• Selectable retry (A4952 only)
Packages:
10-pin MSOP
with exposed thermal pad
(LY package)
Description
Designed for pulse width modulated (PWM) control of DC
motors, the A4952 and A4953 are capable of peak output
currents to ±2 A and operating voltages to 40 V.
Input terminals are provided for use in controlling the speed and
direction of a DC motor with externally applied PWM control
signals. Internal synchronous rectification control circuitry is
provided to lower power dissipation during PWM operation.
Internal circuit protection includes overcurrent protection,
motor lead short to ground or supply, thermal shutdown with
hysteresis, undervoltage monitoring of VBB, and crossover-
current protection.
The A4952 is provided in a low-profile 10-pin MSOP package
(suffix LY) and the A4953 is provided in a low-profile
8-pin SOICN package (suffix LJ). Both packages have an
exposed thermal pad, and are lead (Pb) free, with 100% matte tin
leadframe plating.
8-pin SOICN
with exposed thermal pad
(LJ package)
Not to scale
Functional Block Diagram
A4952 only
RTRY
VINT
IN1
IN2
GND
A4952 only
FLTn
VREF
÷ 10
OSC
Charge
Pump
Control
Logic
Disable
TSD
UVLO
7V
Load Supply
VBB
OUT1
OUT2
LSS
(Optional)
A4952-DS, Rev. 2
Free Datasheet http://www.Datasheet4U.com




A4953 pdf, 반도체, 판매, 대치품
A4952 and
A4953
Full-Bridge DMOS PWM Motor Drivers
Characteristic Performance
PWM Control Timing Diagram
VIN(1)
IN1
GND
VIN(1)
IN2
GND
+IREG
IOUT(x)
0A
-IREG
Forward/
Fast Decay
Reverse/
Fast Decay
Forward/
Slow Decay
Reverse/
Slow Decay
PWM Control Truth Table
IN1 IN2 10×VS > VREF
0 1 False
1 0 False
0 1 True
1 0 True
1 1 False
0 0 False
Note: Z indicates high impedance.
OUT1
L
H
H/L
L
L
Z
OUT2
H
L
L
H/L
L
Z
Function
Reverse
Forward
Chop (mixed decay), reverse
Chop (mixed decay), forward
Brake (slow decay)
Coast, enters Low Power Standby mode after 1 ms
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
Free Datasheet http://www.Datasheet4U.com

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A4953 전자부품, 판매, 대치품
A4952 and
A4953
Full-Bridge DMOS PWM Motor Drivers
Application Information
Sense Pin (LSS)
In order to use PWM current control, a low-value resistor is
placed between the LSS pin and ground for current sensing pur-
poses. To minimize ground-trace IR drops in sensing the output
current level, the current sensing resistor should have an indepen-
dent ground return to the star ground point. This trace should be
as short as possible. For low-value sense resistors, the IR drops in
the PCB can be significant, and should be taken into account.
When selecting a value for the sense resistor be sure not to
exceed the maximum voltage on the LSS pin of ±500 mV at
maximum load. During overcurrent events, this rating may be
exceeded for short durations.
Ground
A star ground should be located as close to the A4952/ A4953
as possible. The copper ground plane directly under the exposed
thermal pad of the device makes a good location for the star
ground point. The exposed pad can be connected to ground for
this purpose.
Layout
The PCB should have a thick ground plane. For optimum electri-
cal and thermal performance, the A4952/A4953 must be soldered
directly onto the board. On the underside of the A4952/A4953
package is an exposed pad, which provides a path for enhanced
thermal dissipation. The thermal pad must be soldered directly to
an exposed surface on the PCB in order to achieve optimal ther-
mal conduction. Thermal vias are used to transfer heat to other
layers of the PCB.
The load supply pin, VBB, should be decoupled with an electro-
lytic capacitor (typically 100 μF) in parallel with a lower valued
ceramic capacitor placed as close as practicable to the device.
Layout for the A4952 (LY package)
GND
GND
OUT2
RS
A4952
PCB
Thermal Vias
Solder
Trace (2 oz.)
Signal (1 oz.)
Ground (1 oz.)
Thermal (2 oz.
C1
C2
BULK
CAPACITANCE
OUT1
VBB
1 FLTn
RTRY
IN2
IN1
VREF
A4952
PAD
GND
OUT2
LSS
OUT1
VBB
RS
C1
VBB
C2
GND
GND
Bill of Materials
Item
Reference
1 RS
2 C1
3 C2
Value
0.25
(for VREF = 5 V, IOUT = 2 A)
0.22
100
Units
Ω
μF
μF
Description
2512, 1 W, 1% or better,
carbon film chip resistor
X5R minimum, 50 V or greater
Electrolytic, 50 V or greater
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
7
Free Datasheet http://www.Datasheet4U.com

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