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PDF MAX6747 Data sheet ( Hoja de datos )
| Número de pieza | MAX6747 | |
| Descripción | uP Reset Circuits | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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19-2530; Rev 2; 8/03
µP Reset Circuits with Capacitor-Adjustable
Reset/Watchdog Timeout Delay
General Description
The MAX6746–MAX6753 low-power microprocessor
(µP) supervisory circuits monitor single/dual system
supply voltages from 1.575V to 5V and provide maxi-
mum adjustability for reset and watchdog functions.
These devices assert a reset signal whenever the V CC
supply voltage or RESET IN falls below its reset thresh-
old or when manual reset is pulled low. The reset output
remains asserted for the reset timeout period after V CC
and RESET IN rise above the reset threshold. The reset
function features immunity to power-supply transients.
The MAX6746–MAX6753 have ±2% factory-trimmed
reset threshold voltages in approximately 100mV incre-
ments from 1.575V to 5.0V and/or adjustable reset
threshold voltages using external resistors.
The reset and watchdog delays are adjustable with
external capacitors. The MAX6746–MAX6751 contain a
watchdog select input that extends the watchdog time-
out period by 128x. The MAX6752/MAX6753 contain a
window watchdog timer that looks for activity outside an
expected window of operation.
The MAX6746–MAX6753 are available with a push-pull
or open-drain active-low RESET output. The MAX6746–
MAX6753 are available in an 8-pin SOT23 package and
are fully specified over the automotive temperature
range (-40°C to +125°C).
Applications
Medical Equipment
Automotive
Intelligent Instruments
Portable Equipment
Battery-Powered
Computers/Controllers
Embedded Controllers
Critical µP Monitoring
Set-Top Boxes
Computers
Pin Configurations
TOP VIEW
RESET IN (MR) 1
SWT 2
SRT 3
GND 4
MAX6746–
MAX6751
8 VCC
7 RESET
6 WDI
5 WDS
SOT23-8
( ) ARE FOR MAX6746 AND MAX6747 ONLY.
Pin Configurations continued at end of data sheet.
Features
o Factory-Set Reset Threshold Options from 1.575V
to 5V in ~100mV Increments
o Adjustable Reset Threshold Options
o Single/Dual Voltage Monitoring
o Capacitor-Adjustable Reset Timeout
o Capacitor-Adjustable Watchdog Timeout
o Min/Max (Windowed) Watchdog Option
o Manual Reset Input Option
o Guaranteed RESET Valid for VCC ≥ 1V
o 3.7µA Supply Current
o Push-Pull or Open-Drain RESET Output Options
o Power-Supply Transient Immunity
o Small 8-Pin SOT23 Packages
Ordering Information
PART
MAX6746KA_ _-T
MAX6747KA_ _-T
MAX6748KA-T
MAX6749KA-T
MAX6750KA_ _-T
MAX6751KA_ _-T
MAX6752KA_ _-T
MAX6753KA_ _-T
TEMP RANGE
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
PIN-PACKAGE
8 SOT23-8
8 SOT23-8
8 SOT23-8
8 SOT23-8
8 SOT23-8
8 SOT23-8
8 SOT23-8
8 SOT23-8
Note: “_ _” represents the two number suffix needed when
ordering the reset threshold voltage value for the
MAX6746/MAX6747 and MAX6750–MAX6753. The reset
threshold voltages are available in approximately 100mV incre-
ments. Table 2 contains the suffix and reset factory-trimmed
voltages. All devices are available in tape-and-reel only. There
is a 2500-piece minimum order increment for standard ver-
sions (see Table 3). Sample stock is typically held on standard
versions only. Nonstandard versions require a minimum order
increment of 10,000 pieces. Contact factory for availability.
Selector Guide appears at end of data sheet.
Typical Operating Circuit appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery,and ordering informationp, lease contact Maxim/Dallas Directa!t
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
http://www.Datasheet4U.com/
1 page  
µP Reset Circuits with Capacitor-Adjustable
Reset/Watchdog Timeout Delay
Typical Operating Characteristics (continued)
(VCC = +5V, TA = +25°C, unless otherwise noted.)
VCC TO RESET DELAY
vs. TEMPERATURE (VCC FALLING)
27.0
VCC FALLING AT 1mV/µs
26.6
26.2
25.8
RESET AND WATCHDOG
TIMEOUT PERIOD vs. VCC
0.60
CSWT = CSRT = 100pF
0.56
0.52
0.48
RESET AND WATCHING TIMEOUT
PERIOD vs. VCC
9.0
CSWT = CSRT = 1500pF
8.5
RESET
8.0
WATCHDOG
7.5
7.0
25.4 0.44
6.5
25.0
-50 -25
0 25 50 75 100 125
TEMPERATURE (°C)
0.40
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
VCC (V)
6.0
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
VCC (V)
MAX6746
MAX6747
1
—
—
2
3
4
Pin Description
PIN
MAX6748–
MAX6751
—
1
—
2
3
4
MAX6752
MAX6753
—
—
1
2
3
4
NAME
FUNCTION
MR
Manual Reset Input. Pull MR low to manually reset the device. Reset
remains asserted for the reset timeout period after MR is released.
Reset Input. High-impedance input to the adjustable reset comparator.
RESET IN Connect RESET IN to the center point of an external resistor-divider to
set the threshold of the externally monitored voltage.
SET0
SWT
Logic Input. SET0 selects watchdog window ratio or disables the
watchdog timer. See Table 1.
Watchdog Timeout Input.
MAX6746–MAX6751: Connect a capacitor between SWT and ground to
set the basic watchdog timeout period (tWD). Determine the period by
the formula tWD = 5.06 x 106 x CSWT with tWD in seconds and CSWT in
Farads. Extend the basic watchdog timeout period by using the WDS
input. Connect SWT to ground to disable the watchdog timer function.
MAX6752/MAX6753: Connect a capacitor between SWT and ground to
set the slow watchdog timeout period (tWD2). Determine the slow
watchdog period by the formula: tWD2 = 0.65 x 109 x CSWT with tWD2 in
seconds and CSWT in Farads. The fast watchdog timeout period is set
by pinstrapping SET0 and SET1 (Connect SET0 high and SET1 low to
disable the watchdog timer function.) See Table 1.
SRT
GND
Reset Timeout Input. Connect a capacitor from SRT to GND to select
the reset timeout period. Determine the period as follows: tRP = 5.06 x
106 x CSRT with tRP in seconds and CSRT in Farads.
Ground
_______________________________________________________________________________________ 5
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5 Page 
µP Reset Circuits with Capacitor-Adjustable
Reset/Watchdog Timeout Delay
Interfacing to Other Voltages for
Logic Compatibility
The open-drain RESET output can be used to interface
to a µP with other logic levels. As shown in Figure 6, the
open-drain output can be connected to voltages from 0
to 6V.
Generally, the pullup resistor connected to the RESET
connects to the supply voltage that is being monitored
at the IC ’s V CC pin. However, some systems can use
the open-drain output to level-shift from the monitored
supply to reset circuitry powered by some other supply.
Keep in mind that as the supervisor ’s V CC decreases
towards 1V, so does the IC ’s ability to sink current at
RESET. Also, with any pullup resistor, RESET is pulled
high as V CC decays toward zero. The voltage where
this occurs depends on the pullup resistor value and
the voltage to which it is connected.
Ensuring a Valid RESET Down to VCC = 0V
(Push-Pull RESET)
When VCC falls below 1V, RESET current sinking capabil-
ities decline drastically. The high-impedance CMOS-
logic inputs connected to RESET can drift to undeter-
mined voltages. This presents no problems in most
applications, since most µPs and other circuitry do not
operate with VCC below 1V.
In those applications where RESET must be valid down
to 0V, add a pulldown resistor between RESET and
GND for the MAX6746/MAX6748/MAX6750/MAX6752
push/pull outputs. The resistor sinks any stray leakage
currents, holding RESET low (Figure 7). The value of the
pulldown resistor is not critical; 100k Ω is large enough
not to load RESET and small enough to pull RESET to
ground. The external pulldown can not be used with
the open-drain reset outputs.
VCC
VCC
MAX6746
MAX6748
MAX6450
MAX6752
RESET
GND
100kΩ
Figure 7. Ensuring RESET Valid to VCC = 0
______________________________________________________________________________________ 11
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| PDF Descargar | [ Datasheet MAX6747.PDF ] | |
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