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부품번호 | MAX4525 기능 |
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기능 | Single-Supply Multiplexer and Switch | ||
제조업체 | Maxim Integrated | ||
로고 | |||
전체 14 페이지수
19-1332; Rev 2; 6/07
Low-Voltage, Single-Supply
Multiplexer and Switch
________________General Description
The MAX4524/MAX4525 are low-voltage, single-supply
CMOS analog switches configured as a 4-channel mul-
tiplexer/demultiplexer (MAX4524) and a double-
pole/double-throw (DPDT) switch (MAX4525). Both
have an inhibit input to simultaneously open all signal
paths.
These devices operate from a single supply of +2V to
+12V and are optimized for operation with +3V or +5V
supplies. On-resistance is 200Ω with a +5V supply and
500Ω with a +3V supply. Each switch can handle Rail-
to-Rail analog signals. The off-leakage current is only
2nA at +25°C or 20nA at +85°C.
All digital inputs have 0.8V to 2.4V logic thresholds,
ensuring TTL/CMOS-logic compatibility when using a
single +5V supply.
________________________Applications
Battery-Operated Equipment
Audio and Video Signal Routing
Low-Voltage Data-Acquisition Systems
Communications Circuits
____________________________Features
o Tiny 10-Pin TDFN Package
o Single-Supply Operation from +2V to +12V
o 200Ω On-Resistance with +5V Supply
o 500Ω On-Resistance with +3V Supply
o Guaranteed 8Ω On-Resistance Match at +5V
o Guaranteed 2nA Max On-Leakage at +5V
o TTL/CMOS-Logic Compatible
_______________Ordering Information
PART
TEMP RANGE
MAX4524CUB
MAX4524C/D
MAX4524EUB
0°C to +70°C
0°C to +70°C
-40°C to +85°C
MAX4524ETB -40°C to +85°C
MAX4525CUB
MAX4525C/D
MAX4525EUB
0°C to +70°C
0°C to +70°C
-40°C to +85°C
MAX4525ETB -40°C to +85°C
*Contact factory for availability.
**EP = Exposed Pad.
PIN-
PACKAGE
10 µMAX
Dice*
10 µMAX
10 TDFN-EP**
(3mm x 3mm)
10 µMAX
Dice*
10 µMAX
10 TDFN-EP**
(3mm x 3mm)
TOP
MARK
—
—
—
AAP
—
—
—
AAQ
______________________Pin Configurations/Functional Diagrams/Truth Tables
TOP VIEW
NO2 1
NO3 2
NO1 3
INH 4
GND 5
NO2 1
NO3 2
NO1 3
INH 4
GND 5
MAX4524
LOGIC
µMAX
LOGIC
TDFN
10 V+
9 COM
8 NO0
7 ADDA
6 ADDB
10 V+
9 COM
8 NO0
7 ADDA
6 ADDB
MAX4525
NOA 1
COMA 2
NCA 3
INH 4
GND 5
NOA 1
COMA 2
NCA 3
INH 4
GND 5
LOGIC
µMAX
LOGIC
TDFN
10 V+
9 COMB
8 NOB
7 NCB
6 ADD
10 V+
9 COMB
8 NOB
7 NCB
6 ADD
MAX4525
INH ADD ON SWITCH
1X
NONE
0
0
COMA-NCA,
COMB-NCB
0
1
COMA-NOA,
COMB-NOB
MAX4524
INH ADDB ADDA ON SWITCH
1X
X
NONE
00
0 COM-NO0
00
1 COM-NO1
01
0 COM-NO2
01
1 COM-NO3
X = DON’T CARE
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
http://www.Datasheet4U.com
Low-Voltage, Single-Supply
Multiplexer and Switch
ELECTRICAL CHARACTERISTICS—Single +3V Supply (continued)
(V+ = 2.7V to 3.6V, GND = 0V, VAH = 2.0V, VAL = 0.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at
TA = +25°C.) (Notes 2, 7)
PARAMETER
SYMBOL
CONDITIONS
TEMP
MIN TYP MAX
(Note 2)
UNITS
COM On-Leakage
(Note 6)
DIGITAL I/O
ICOM(ON) V+ = 3.6V; VCOM = 3V, 1V
MAX4524
MAX4525
+25°C
C, E
+25°C
C, E
-2
-50
-1
-25
+2
+50
nA
+1
+25
Logic Input Logic
Threshold High
VIH
C, E
1.0 2.0
V
Logic Input Logic
Threshold Low
VIL
C, E 0.5 1.0
V
Input Current High
IIH VA = VINH = 2.0V
Input Current Low
IIH VA = VINH = 0.5V
SWITCH DYNAMIC CHARACTERISTICS (Note 6)
C, E -1
C, E -1
+1 µA
+1 µA
Inhibit Turn-On Time
Inhibit Turn-Off Time
Address Transition Time
Break-Before-Make Time
POWER SUPPLY
Power-Supply Current
t(ON)
VNO_ = 1.5V, RL = 300Ω, CL = 35pF,
Figure 2
+25°C
C, E
170 300
400
t(OFF)
VNO_ = 1.5V, RL = 300Ω, CL = 35pF,
Figure 2
+25°C
C, E
50 200
300
tTRANS
VNO_ = 1.5V/0V, RL = 300Ω, CL = 35pF,
Figure 1
+25°C
C, E
130 300
400
tBBM Figure 3, VNO_ = 1.5V, RL = 300Ω, CL = 35pF +25°C 5
40
I+ V+ = 3.6V, VADD = VINH = V+ or 0V
+25°C -1
C, E -10
+1
+10
ns
ns
ns
ns
µA
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
∆RON = RON(MAX) - RON(MIN)
Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges; i.e., VNO = 3V to 0V and 0V to 3V.
Leakage parameters are 100% tested at maximum-rated hot operating temperature, and guaranteed by correlation at
TA = +25°C.
Guaranteed by design, not production tested.
TDFN parts are tested at +25°C and are guaranteed by design and correlation over the entire temperature range.
4 _______________________________________________________________________________________
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4페이지 Low-Voltage, Single-Supply
Multiplexer and Switch
__________Applications Information
Power-Supply Considerations
The MAX4524/MAX4525’s construction is typical of
most CMOS analog switches. They have two supply
pins: V+ and GND. V+ and GND are used to drive the
internal CMOS switches and set the limits of the analog
voltage on any switch. Reverse ESD-protection diodes
are internally connected between each analog signal
pin and both V+ and GND. If any analog signal
exceeds V+ or GND, one of these diodes will conduct.
During normal operation, these (and other) reverse-
biased ESD diodes leak, forming the only current drawn
from V+ or GND.
Virtually all the analog leakage current comes from the
ESD diodes. Although the ESD diodes on a given sig-
nal pin are identical, and therefore fairly well balanced,
they are reverse-biased differently. Each is biased by
either V+ or GND and the analog signal. This means
that leakage will vary as the signal varies. The differ-
ence in the two diode leakages to the V+ and GND
pins constitutes the analog signal-path leakage current.
All analog leakage current flows between each pin and
one of the supply terminals, not to the other switch ter-
minal. This is why both sides of a given switch can
show leakage currents of either the same or opposite
polarity.
______________________________________________Test Circuits/Timing Diagrams
V+
VADD ADDA
ADDB
50Ω
V+
NO0
NO1–NO2
V+
MAX4524 NO3
INH COM
GND
300Ω
VOUT
35pF
V+
VADD
V+
ADD NO
50Ω
MAX4525 NC
V+
INH COM
GND
300Ω
VOUT
35pF
VADD
V+
0V
VNO0
VOUT
0V
tTRANS
VADD
V+
0V
VNC
VOUT
0V
tTRANS
50%
90%
50%
90%
90%
tTRANS
90%
tTRANS
REPEAT TEST FOR EACH SECTION.
Figure 1. Address Transition Time
_______________________________________________________________________________________ 7
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구 성 | 총 14 페이지수 | ||
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DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |