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PDF MAX550A Data sheet ( Hoja de datos )
| Número de pieza | MAX550A | |
| Descripción | 8-Bit Voltage-Output DACs | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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19-1206; Rev 0; 3/97
+2.5V to +5.5V, Low-Power, Single/Dual,
8-Bit Voltage-Output DACs in µMAX Package
_______________General Description
The MAX548A/MAX549A/MAX550A serial, 8-bit voltage-
output digital-to-analog converters (DACs) operate from
a single +2.5V to +5.5V supply. Their ±1LSB TUE spec-
ification is guaranteed over temperature. Operating cur-
rent (supply current plus reference current) is typically
75µA per DAC with VDD = 2.5V. In shutdown, the DAC
is disconnected from the reference, reducing current
drain to less than 1µA. The MAX548A/MAX549A allow
each DAC to be shut down independently.
The 10MHz, 3-wire serial interface is compatible with
SPI™/QSPI™ and Microwire™ interface standards.
Double-buffered inputs provide flexibility when updat-
ing the DACs; the input and DAC registers can be
updated individually or simultaneously.
The MAX548A is a dual DAC with an asynchronous
load input; it uses VDD as the reference input. The
MAX549A is a dual DAC with an external reference
input. The MAX550A is a single DAC with an external
reference input and an asynchronous load input.
The MAX548A/MAX549A/MAX550A’s low power con-
sumption and small µMAX and DIP packages make
these devices ideal for portable and battery-powered
applications.
________________________Applications
Battery-Powered Systems
VCXO Control
Comparator-Level Settings
GaAs Amp Bias Control
Digital Gain and Offset Control
____________________________Features
o +2.5V to +5.5V Single-Supply Operation
o ±1LSB (max) TUE
o Power-On Reset Clears All Registers to Zero
o Low Operating Current:
150µA (MAX548A/MAX549A, VREF = +2.5V)
75µA (MAX550A, VREF = +2.5V)
o 1µA Shutdown Mode
o 10MHz, 3-Wire Serial Interface Compatible with
SPI/QSPI and Microwire
o µMAX Package—50% Smaller than 8-Pin SO
o Independent Shutdown of DACs
(MAX548A/MAX549A)
______________Ordering Information
PART
MAX548ACPA
MAX548ACUA
MAX548AC/D
MAX548AEPA
MAX548AEUA
TEMP. RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE†
8 Plastic DIP
8 µMAX
Dice*
8 Plastic DIP
8 µMAX
Ordering Information continued at end of data sheet.
*Dice are specified at TA = +25°C, DC parameters only.
†Contact factory for availability of 8-pin SO package.
_____________________Selector Guide _________________Pin Configurations
FEATURE
Number of DACs
DAC Reference
Asynchronous
Load DAC Input
µMAX Package
MAX548A MAX549A MAX550A
221
VDD External External
√—√
√√√
TOP VIEW
GND 1
OUTA 2
CS 3
DIN 4
MAX548A
8 VDD
7 OUTB
6 LDAC
5 SCLK
SPI and QSPI are trademarks of Motorola Inc.
Microwire is a trademark of National Semiconductor Corp.
DIP/µMAX
Pin Configurations continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products 1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
http://www.Datasheet4U.com
1 page  
+2.5V to +5.5V, Low-Power, Single/Dual,
8-Bit Voltage-Output DACs in µMAX Package
_____________________________Typical Operating Characteristics (continued)
(VDD = VREF = 2.5V, RL = 1MΩ, CL = 15pF, TA = +25°C, unless otherwise noted.)
OUTPUT GLITCH FILTERING
CODE = 00 hex
SETTLING TIME (RISING)
DAC CODE 00 hex to FF hex
5µs/div
OUT, 50mV/div, CL = 0pF
OUT, 50mV/div, CL = 100pF
OUT, 50mV/div, CL = 220pF
OUT, 50mV/div, CL = 1000pF
CS, 5V/div
2µs/div
OUT, 1V/div
CS, 5V/div
______________________________________________________________Pin Description
MAX548A
1
2
—
PIN
MAX549A
1
2
—
MAX550A
1
—
2
333
444
555
6—6
7 6—
—7
7
888
NAME
GND
OUTA
OUT
CS
DIN
SCLK
LDAC
OUTB
REF
VDD
FUNCTION
Ground
DAC A Output Voltage
DAC Output Voltage
Chip-Select Input. A logic low on CS enables serial data to be
clocked into the input shift register. Programming commands are
executed at CS’s rising edge.
Serial-Data Input. Data is clocked into the 16-bit input shift register on
SCLK’s rising edge.
Serial-Clock Input. Data is clocked in on SCLK’s rising edge.
Load DAC Input. After CS goes high and if programmed by the
control word, a falling edge on LDAC updates the DAC latch(es).
Connect LDAC to VDD if unused.
DAC B Output Voltage
External Reference Voltage Input for DAC(s)
Positive Power Supply (+2.5V to +5.5V)
_______________________________________________________________________________________ 5
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+2.5V to +5.5V, Low-Power, Single/Dual,
8-Bit Voltage-Output DACs in µMAX Package
Table 3. MAX549A Serial-Interface Programming Commands
CONTROL BYTE
Loaded First
DATA BYTE
Loaded Last
COMMAND
(Commands executed on CS’s rising edge)
UB1 UB2 UB3 C2 C1 C0 A1 A0
D7........D0
UNASSIGNED COMMAND
X X X X 0 X 0 0 XXXXXXXX
COMMANDS LOADING INPUT REGISTER(S) ONLY
Unassigned command
X X X 0 0 X 0 1 8-Bit DAC Data Load DAC A input register. DAC registers unchanged.
X X X 0 0 X 1 0 8-Bit DAC Data Load DAC B input register. DAC registers unchanged.
X
X
X
0
0
X
1
1
8-Bit DAC Data
Load both DAC input registers. DAC registers
unchanged.
COMMANDS UPDATING DAC REGISTER(S)
X
X X X1X00
XXXXXXXX
Update both DAC registers with current contents of their
input registers. Both input registers unchanged.
X
X
X
0
1
X
0
1
8-Bit DAC Data
Load DAC A input register and update both DAC
registers. DAC B input register unchanged.
X
X
X
0
1
X
1
0
8-Bit DAC Data
Load DAC B input register and update both DAC
registers. DAC A input register unchanged.
X
X
X
0
1
X
1
1
8-Bit DAC Data
Load both DAC input registers and update both DAC
registers.
COMMANDS POWERING DOWN AND LOADING INPUT REGISTER(S) ONLY
X
X
X
1
0
X
0
1
8-Bit DAC Data
Load DAC A input register and power down DAC A.
DAC B input register and both DAC registers unchanged.
X
X
X
1
0
X
1
0
8-Bit DAC Data
Load DAC B input register and power down DAC B.
DAC A input register and both DAC registers unchanged.
X
X
X
1
0
X
1
1
8-Bit DAC Data
Load both DAC input registers and power down both
DACs. Both DAC registers unchanged.
COMMANDS POWERING DOWN AND UPDATING DAC REGISTER(S)
Load DAC A input register, power down DAC A, and
X X X 1 1 X 0 1 8-Bit DAC Data update both DAC registers. DAC B input register
unchanged.
Load DAC B input register, power down DAC B, and
X X X 1 1 X 1 0 8-Bit DAC Data update both DAC registers. DAC A input register
unchanged.
X
X
X
1
1
X
1
1
8-Bit DAC Data
Load both DAC input registers, power down both DACs,
and update both DAC registers.
X = Don’t care
______________________________________________________________________________________ 11
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| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet MAX550A.PDF ] | |
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