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MX25V512C 데이터시트 PDF




MACRONIX에서 제조한 전자 부품 MX25V512C은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


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부품번호 MX25V512C 기능
기능 512K-BIT [x 1] 2.5V CMOS SERIAL FLASH
제조업체 MACRONIX
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MX25V512C 데이터시트, 핀배열, 회로
MX25V512C
512K-BIT [x 1] 2.5V CMOS SERIAL FLASH
FEATURES
GENERAL
• Serial Peripheral Interface compatible -- Mode 0 and Mode 3
• 524,288 x 1 bit structure
• 16 Equal Sectors with 4K byte each
- Any Sector can be erased individually
• Single Power Supply Operation
- 2.35 to 3.6 volt for read, erase, and program operations
• Latch-up protected to 100mA from -1V to Vcc +1V
PERFORMANCE
• High Performance
- Fast access time: 50MHz serial clock
- Fast program time: 1.4ms(typ.) and 5ms(max.)/page (256-byte per page)
- Fast erase time: 60ms(typ.)/sector (4K-byte per sector) ; 1s(typ.) and 2s(max.)/chip(512Kb)
• Low Power Consumption
- Low active read current: 8mA(max.) at 50MHz and 4mA(max.) at 25MHz
- Low active programming current: 15mA (max.)
- Low active erase current: 15mA (max.)
- Low standby current: 10uA (max.)
- Deep power-down mode 1uA (typical)
• Minimum 100,000 erase/program cycles
• 20 years of data retention
SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code
• Block Lock protection
- The BP0~BP1 status bit defines the size of the area to be software protected against Program and Erase in-
structions.
• Auto Erase and Auto Program Algorithm
- Automatically erases and verifies data at selected sector
- Automatically programs and verifies data at selected page by an internal algorithm that automatically times the
program pulse widths (Any page to be programed should have page in the erased state first).
Status Register Feature
Electronic Identification
- JEDEC 2-byte Device ID
- RES command, 1-byte Device ID
P/N: PM1470
REV. 1.2, JAN. 04, 2011
1
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MX25V512C pdf, 반도체, 판매, 대치품
MX25V512C
Table 7. Power-Up Timing ................................................................................................................................ 26
INITIAL DELIVERY STATE............................................................................................................................... 26
Figure 7. Serial Input Timing............................................................................................................................. 27
Figure 8. Output Timing.................................................................................................................................... 27
Figure 9. Hold Timing........................................................................................................................................ 28
Figure 10. WP# Disable Setup and Hold Timing during WRSR when SRWD=1.............................................. 28
Figure 11. Write Enable (WREN) Sequence (Command 06)............................................................................ 29
Figure 12. Write Disable (WRDI) Sequence (Command 04)............................................................................ 29
Figure 13. Read Identification (RDID) Sequence (Command 9F).................................................................... 29
Figure 14. Read Status Register (RDSR) Sequence (Command 05)............................................................... 30
Figure 15. Write Status Register (WRSR) Sequence (Command 01)............................................................. 30
Figure 16. Read Data Bytes (READ) Sequence (Command 03)..................................................................... 30
Figure 17. Read at Higher Speed (FAST_READ) Sequence (Command 0B)................................................. 31
Figure 18. Page Program (PP) Sequence (Command 02).............................................................................. 32
Figure 19. Sector Erase (SE) Sequence (Command 20)................................................................................. 33
Figure 20. Block Erase (BE) Sequence (Command 52 or D8)........................................................................ 33
Figure 21. Chip Erase (CE) Sequence (Command 60 or C7).......................................................................... 34
Figure 22. Deep Power-down (DP) Sequence (Command B9)....................................................................... 34
Figure 23. Release from Deep Power-down and Read Electronic Signature (RES) Sequence (Command AB).
.......................................................................................................................................................................... 34
Figure 24. Release from Deep Power-down (RDP) Sequence (Command AB).............................................. 35
Figure 25. Read Electronic Manufacturer & Device ID (REMS) Sequence (Command 90)............................ 35
Figure 26. Power-up Timing.............................................................................................................................. 36
OPERATING CONDITIONS...................................................................................................................... 37
Figure 27. AC Timing at Device Power-Up....................................................................................................... 37
Figure 28. Power-Down Sequence................................................................................................................... 38
ERASE AND PROGRAMMING PERFORMANCE.................................................................................... 39
LATCH-UP CHARACTERISTICS.............................................................................................................. 39
ORDERING INFORMATION...................................................................................................................... 40
PART NAME DESCRIPTION.................................................................................................................... 41
PACKAGE INFORMATION....................................................................................................................... 42
8-land USON (2x3 mm, 0.6mm package height).............................................................................................. 42
8-pin TSSOP (173mil)....................................................................................................................................... 43
P/N: PM1470
REV. 1.2, JAN. 04, 2011
4
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MX25V512C 전자부품, 판매, 대치품
PIN CONFIGURATIONS
8-LAND USON (2x3mm)
CS# 1
SO 2
WP# 3
GND 4
8 VCC
7 HOLD#
6 SCLK
5 SI
8-PIN TSSOP (173mil)
CS#
SO
WP#
GND
1
2
3
4
8 VCC
7 HOLD#
6 SCLK
5 SI
MX25V512C
PIN DESCRIPTION
SYMBOL DESCRIPTION
CS# Chip Select
SI Serial Data Input
SO Serial Data Output
SCLK Clock Input
HOLD#
Hold, to pause the device without
deselecting the device
WP# Write Protection
VCC + 2.5V Power Supply
GND Ground
P/N: PM1470
REV. 1.2, JAN. 04, 2011
7
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