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SIHF740S 데이터시트 PDF




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부품번호 SIHF740S 기능
기능 Power MOSFET ( Transistor )
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SIHF740S 데이터시트, 핀배열, 회로
Power MOSFET
IRF740S, SiHF740S
Vishay Siliconix
PRODUCT SUMMARY
VDS (V)
RDS(on) ()
Qg (Max.) (nC)
Qgs (nC)
Qgd (nC)
Configuration
400
VGS = 10 V
63
9.0
32
Single
0.55
D2PAK (TO-263)
D
GD
S
G
S
N-Channel MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free and Halogen-free
Lead (Pb)-free
Note
a. See device orientation.
D2PAK (TO-263)
SiHF740S-GE3
IRF740SPbF
SiHF740S-E3
FEATURES
Halogen-free According to IEC 61249-2-21
Definition
• Surface Mount
• Available in Tape and Reel
• Dynamic dV/dt Rating
• Repetitive Avalanche Rated
• Fast Switching
• Ease of Paralleling
• Simple Drive Requirements
• Compliant to RoHS Directive 2002/95/EC
DESCRIPTION
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The D2PAK (TO-263) is a surface mount power package
capable of accommodating die size up to HEX-4. It provides
the highest power capability and the lowest possible
on-resistance in any existing surface mount package. The
D2PAK (TO-263) is suitable for high current applications
because of its low internal connection resistance and can
dissipate up to 2.0 W in a typical surface mount application.
D2PAK (TO-263)
SiHF740STRL-GE3a
IRF740STRLPbFa
SiHF740STL-E3a
D2PAK (TO-263)
SiHF740STRR-GE3a
IRF740STRRPbFa
SiHF740STR-E3a
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Currenta
Linear Derating Factor
Linear Derating Factor (PCB Mount)e
Single Pulse Avalanche Energyb
Avalanche Currenta
Repetitive Avalanche Energya
Maximum Power Dissipation
Maximum Power Dissipation (PCB Mount)e
Peak Diode Recovery dV/dtc
VGS at 10 V
TC = 25 °C
TC = 100 °C
VDS
VGS
ID
IDM
TC = 25 °C
TA = 25 °C
EAS
IAR
EAR
PD
dV/dt
Operating Junction and Storage Temperature Range
TJ, Tstg
Soldering Recommendations (Peak Temperature)
for 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 50 V, starting TJ = 25 °C, L = 9.1 mH, Rg = 25 , IAS = 10 A (see fig. 12).
c. ISD 10A, dI/dt 120 A/μs, VDD VDS, TJ 150 °C.
d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).
LIMIT
400
± 20
10
6.3
40
1.0
0.025
520
10
13
125
3.1
4.0
- 55 to + 150
300d
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91055
S11-1049-Rev. C, 30-May-11
www.vishay.com
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Free Datasheet http://www.Datasheet4U.com




SIHF740S pdf, 반도체, 판매, 대치품
IRF740S, SiHF740S
Vishay Siliconix
2500
2000
1500
VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
Coss = Cds + Cgd
Ciss
1000
500
0
100
91055_05
Coss
Crss
101
VDS, Drain-to-Source Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
150 °C
101
25 °C
100
10-1
0.50
91055_07
VGS = 0 V
0.70 0.90 1.10 1.30 1.50
VSD, Source-to-Drain Voltage (V)
Fig. 7 - Typical Source-Drain Diode Forward Voltage
20 ID = 10 A
16
VDS = 320 V
VDS = 200 V
12 VDS = 80 V
8
4
0
0
91055_06
For test circuit
see figure 13
15 30 45 60 75
QG, Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
103
5
2
102
5
2
10
5
2
1
5
2
0.1
2
0.1
Operation in this area limited
by RDS(on)
10 µs
100 µs
52
1
1 ms
10 ms
TC = 25 °C
TJ = 150 °C
Single Pulse
52
10
5 102 2
5 103
91055_08
VDS, Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
www.vishay.com
4
Document Number: 91055
S11-1049-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Free Datasheet http://www.Datasheet4U.com

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SIHF740S 전자부품, 판매, 대치품
IRF740S, SiHF740S
Vishay Siliconix
D.U.T.
+
-
Peak Diode Recovery dV/dt Test Circuit
+ Circuit layout considerations
Low stray inductance
Ground plane
Low leakage inductance
current transformer
-
-+
Rg
dV/dt controlled by Rg
+
Driver same type as D.U.T.
ISD controlled by duty factor “D”
- VDD
D.U.T. - device under test
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Body diode forward drop
Inductor current
Ripple 5 %
Note
a. VGS = 5 V for logic level devices
VDD
ISD
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91055.
Document Number: 91055
S11-1049-Rev. C, 30-May-11
www.vishay.com
7
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Free Datasheet http://www.Datasheet4U.com

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부품번호상세설명 및 기능제조사
SiHF740

Power MOSFET ( Transistor )

Vishay Siliconix
Vishay Siliconix
SiHF740

Power MOSFET ( Transistor )

Vishay
Vishay

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