PDF PBL38772-1 Data sheet ( Hoja de datos )

Número de pieza	PBL38772-1
Descripción	Subscriber Line Interface Circuit
Fabricantes	Ericsson
Logotipo
Hay una vista previa y un enlace de descarga de PBL38772-1 (archivo pdf) en la parte inferior de esta página. Total 14 Páginas
No Preview Available ! www.DataSheet4U.com Advance Information PBL 387 72/1 Key Features • On-chip high voltage ring generation - Balanced, up to 80 VPeak - Any ring waveform - 5 REN ringing load - Short circuit safe - Automatic gain control of ringing signal • Low on-hook power consumption in Active State (65mW @ VBat=-80V) • Automatic switching between ringing battery (VBat) and talk battery (VTBat) • Only +5V and Battery supplies needed • Pulse metering and on-hook transmission • UL-1950 and MTU compliant on-hook line voltage • Programmable ring trip threshold • 3.3V compatible logic interface • Silent or fast polarity reversal • 28-pin SOIC package Applications • Cable modems • Voice over DSL (VoDSL) • Terminal adapters • ISDN Terminal adapters (NT1+) • Voice over IP (VoIP) • Routers • Integrated Access Devices (IAD) • Other short loop applications Description The PBL 387 72/1 Subscriber Line Interface Circuit (SLIC) is a 90 V bipolar integrated circuit with on-chip high voltage ring generation for use in short loop applications. The PBL 387 72/1 SLIC has been optimized for low power consumption, low total line interface cost and for a high degree of flexibility meeting worldwide requirements. The PBL 387 72/1 SLIC supplies a balanced ringing signal of any waveform (e.g. sinewave, trapezoidal, etc.) VT BA T VBAT BGND TIPX HP RINGX VTB Subscriber Line Interface Circuit Tw o -w ire In terfa ce Ring T rip Detector Li ne Feed Co n trol ler and Longi tu d inal S ignal S uppr es sion O ff-h o o k Detector V F S ignal T rans m ission R ingi ng C ont rol Input Decoder and C o n tro l VCC AGND PRT C1 C2 C3 DE T PL C LP REF SPR PL D VT X RS N CRING VR Figure 1. Block diagram up to 80 VPeak (85 V dc supply) to the subscriber line across a load of up to 5REN The PBL 387 72/1 supplies programmable constant current to the subscriber loop, sourced from the talk battery. The on- hook line voltage of 43 V to 56 V is derived from the ring battery. All battery switching is internal to the device and is automatic. To further reduce power consumption the automatic gain control for the ring signal (AGCR) keeps the level always adjusted to the maximum, that can be sourced from the available dc ringing battery. The SLIC incorporates loop current, ground key and ring trip detection functions. The PBL 387 72/1 is compatible with loop start signaling. Two- to four-wire and four- to two-wire voice frequency (vf) signal conversion is accomplished by the SLIC in conjunction with any standard codec. The line terminating impedance and balance impedance is programmable (via hardware or software) and may be complex or real for worldwide compliance. Tip and ring voltages are UL-1950 compliant, i.e. no two- wire line voltage exceeds 56 V. The PBL 387 72/1 SLIC is available in a surface mount 28 SOIC package. DataSheet4 U .com PBL 387 72/1 shortform Rev. P5 Feb. 14, 2001 1 of 14 http://www.Datasheet4U.com/ 1 page www.DataSheet4U.com Advance Information Parameter Frequency response Two-wire to four-wire, g2-4 Four-wire to two-wire, g4-2 Four-wire to four-wire, g4-4 Insertion loss Two-wire to four-wire, G2-4 Four-wire to two-wire, G4-2 Gain tracking Two-wire to four-wire Four-wire to two-wire Noise Idle channel noise at two-wire port (TIPX-RINGX) Harmonic distortion Two-wire to four-wire Four-wire to two-wire Ref fig Conditions Min 6 Relative to 0 dBm, 1.0 kHz. ERX = 0 V 0.3 kHz < f < 3.4 kHz -0.15 f = 8.0 kHz, 12 kHz, 16 kHz -0.5 6 Relative to 0 dBm, 1.0 kHz. EL = 0 V 0.3 kHz < f < 3.4 kHz -0.15 f = 8 kHz, 12 kHz, -1.0 f = 16 kHz -1.0 Relative to 0 dBm, 1.0 kHz. EL = 0 V 0.3 kHz < f < 3.4 kHz -0.15 6 0 dBm, 1.0 kHz, Note 5 VTX G2-4 = 20 • Log, ERX = 0 VTR 6 0 dBm, 1.0 kHz, Notes 5, 6 VTR G4-2 = 20 • Log, EL = 0 ERX -6.22 -0.2 6 Ref. -10 dBm, 1.0 kHz, Note 7 RLDC ≤ 2kΩ -40 dBm to +3 dBm -55 dBm to -40 dBm 6 Ref. -10 dBm, 1.0 kHz, Note 7 RLDC ≤ 2kΩ -40 dBm to +3 dBm -55 dBm to -40 dBm -0.1 -0.2 -0.1 -0.2 C-message weighting Psophometrical weighting Note 8 6 0 dBm, 1.0 kHz test signal 0.3 kHz < f < 3.4 kHz Figure 6. Frequency response, insertion loss, gain tracking. 1 ωC << RL , RL = 600Ω RL C VTR ILD C TIPX VTX PBL 387 72 RT = 120 kΩ, RRX = 120 kΩ EL RINGX RSN Typ -0.1 -0.2 -0.3 -6.02 5 -85 RT RRX Max Unit 0.15 0.1 0.15 0 0 0.15 dB dB dB dB dB dB -5.82 dB 0.2 dB 0.1 dB 0.2 dB 0.1 dB 0.2 dB 12 dBrnC -78 dBmp -50 dB -50 dB ERX VT X DataSheet4 U .com PBL 387 72/1 shortform Rev. P5 Feb. 14, 2001 5 of 14 http://www.Datasheet4U.com/ 5 Page www.DataSheet4U.com Advance Information RING TIP VTB VB RF1 VB C GG OVP RF2 DB D TB D BB CTB C B C HP C RC C TC C LP C SPR PBL38772 BW BW BW HP BGND RIN GX T IP X VTBAT VBAT VTB LP SP R BW BW VTX RSN AGND VR DET C1 C2 C3 VCC P LD PRT PL C REF CR ING RTX R T RB R RX R VR SYSTEM CONTROL INTERFACE C VR R LD R RT R LC R REF C RIN G VCC C VCC VR RFB -- 0 ++ 0 CODEC/ Filter TX PCM bus DX DR RXPCMbus Figure 8. Single channel subscriber line interface with PBL 387 72/1 and Combo I type codec. RESISTORS: (values according to IEC-63 E96 series) RLD = 49.9 kΩ 1% 1/10 W RLC = 18.7 kΩ 1% 1/10 W RRT = 69.8 kΩ 1% 1/10 W RREF = 15.0 kΩ 1% 1/10 W RRX = 232 kΩ 1% 1/10 W RVR = 200 kΩ 1% 1/10 W RTX = 28.0 kΩ 1% 1/10 W RT = 104 kΩ 1% 1/10 W RFB = 73.2 kΩ 1% 1/10 W RB = 110 kΩ 1% 1/10 W RF1=RF2=4 0 Ω 1% match, Line protection resistor. CAPACITORS: (values according to IEC-63 E6 series) CTB = 150nF 100 V 20% CB = 100nF 100 V 20% CVCC = 100nF 10 V 20% CTC = 1.0nF 100 V 20% CRC = 1.0nF 100 V 20% CHP = 33nF 100 V 20% CLP = 470nF 100 V 20% CGG = 220nF 100 V 20% CRING = 470nF 10 V 20% CVR = 0.33µF 10 V 20% CSPR = optional 10 V 20% DIODES: DB = DTB = DBB =1N4448 OVP: Secondary protection clamp (e g Bourns/Power Innovations TISP PBL3, which serves two lines). The ground terminals of the secondary protection should be connected to the common ground on the Printed Board Assembly with a track as short and wide as possible, preferably to a ground plane. DataSheet4 U .com PBL 387 72/1 shortform Rev. P5 Feb. 14, 2001 11 of 14 http://www.Datasheet4U.com/ 11 Page

Páginas	Total 14 Páginas
PDF Descargar	[ Datasheet PBL38772-1.PDF ]

Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
PBL38772-1	Subscriber Line Interface Circuit	Ericsson

Número de pieza	Descripción	Fabricantes
SLA6805M	High Voltage 3 phase Motor Driver IC.	Sanken
SDC1742	12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.	Analog Devices

DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.

DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar