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PDF AK4343 Data sheet ( Hoja de datos )

Número de pieza AK4343
Descripción Stereo DAC
Fabricantes AKM　
Logotipo AKM Logotipo



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[AK4343]
AK4343
Stereo DAC with HP/RCV/SPK-AMP
GENERAL DESCRIPTION
The AK4343 is a stereo DAC with a built-in Headphone-Amplifier, Rece iver-Amplifier and 1.2W output
Speaker-Amplifier. The AK 4343 features analog mixing ci rcuits and PLL that allows easy interfacing in
mobile phone and portable A/V player designs. The AK4343 is availabl e in a 32pin QFN, utilizing less
board space than competitive offerings.
FEATURES
1. Playback Function
• Digital De-emphasis Filter (tc=50/15μs, fs=32kHz, 44.1kHz, 48kHz)
• Bass Boost
• Soft Mute
• Digital Volume (+12dB ∼ −115.0dB, 0.5dB Step, Mute)
• Digital ALC (Automatic Level Control)
(+36dB ∼ −54dB, 0.375dB Step, Mute)
• Stereo Separation Emphasis
• Programmable EQ
• Stereo Line Output
- Performance: S/(N+D): 88dB, S/N: 92dB
• Mono Receiver-Amp
- BTL Output
- Output Power: 30mW@32Ω (AVDD=3.3V)
• Stereo Headphone-Amp
- S/(N+D): [email protected], S/N: 90dB
- Output Power: 70mW@16Ω (HVDD=5V), 62mW@16Ω (HVDD=3.3V)
- Pop Noise Free at Power ON/OFF
• Mono Speaker-Amp
- S/(N+D): 50dB@240mW, S/N: 90dB
- BTL Output
- Availbable for both Dynamic and Piezo Speaker
- Output Power: 1.2W@8Ω (HVDD=5V), 400mW@8Ω (HVDD=3.3V)
3.0Vrms@50Ω (HVDD=5V)
• Analog Mixing:
- 3 Stereo Input
- Gain Amplifier (+32dB/+26dB/+20dB or 0dB)
2. Power Management
3. Master Clock:
(1) PLL Mode
• Frequencies:
11.2896MHz, 12MHz, 12.288MHz, 13.5MHz, 24MHz, 27MHz (MCKI pin)
1fs (LRCK pin)
32fs or 64fs (BICK pin)
(2) External Clock Mode
• Frequencies: 256fs, 512fs or 1024fs (MCKI pin)
4. Output Master Clock Frequencies: 32fs/64fs/128fs/256fs
5. Sampling Rate:
• PLL Slave Mode (LRCK pin): 7.35kHz ∼ 48kHz
• PLL Slave Mode (BICK pin): 7.35kHz ∼ 48kHz
• PLL Slave Mode (MCKI pin):
8kHz, 11.025kHz, 12kHz, 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, 48kHz
• PLL Master Mode:
8kHz, 11.025kHz, 12kHz, 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, 48kHz
MS0478-E-02
-1-
2010/11
http://www.Datasheet4U.com

1 page




AK4343 pdf
[AK4343]
PIN/FUNCTION
No. Pi n Name
I/O
Function
1 TEST1 -
Test 1 Pin
This pin should be left floating.
2 VCOM
O
Common Voltage Output Pin, 0.45 x AVDD
Bias voltage of DAC outputs.
3 AVSS
- Analog Ground Pin
4 AVDD
- Analog Power Supply Pin
5 VCOC
O
Output Pin for Loop Filter of PLL Circuit (AIN3 bit = “0”: PLL is available)
This pin should be connected to AVSS with one resistor and capacitor in series.
RIN3
I Rch Analog Input 3 Pin (AIN3 bit = “1”: PLL is not available)
6 I2C
I
Control Mode Select Pin
“H”: I2C Bus, “L”: 3-wire Serial
7 PDN
I
Power-Down Mode Pin
“H”: Power-up, “L”: Power-down, reset and initializes the control register.
8
CSN
CAD0
I Chip Select Pin (I2C pin = “L”: 3-wire Serial Mode)
I Chip Address 1 Select Pin (I2C pin = “H”: I2C Bus Mode)
9
CCLK
SCL
I Control Data Clock Pin (I2C pin = “L”: 3-wire Serial Mode)
I Control Data Clock Pin (I2C pin = “H”: I2C Bus Mode)
10
CDTI
SDA
I Control Data Input Pin (I2C pin = “L”: 3-wire Serial Mode)
I/O Control Data Input Pin (I2C pin = “H”: I2C Bus Mode)
11 SDTI
I Audio Serial Data Input Pin
12 TEST2 -
Test 2 Pin
This pin should be left floating.
13 LRCK
I/O Input / Output Channel Clock Pin
14 BICK
I/O Audio Serial Data Clock Pin
15 DVDD
- Digital Power Supply Pin
16 DVSS
- Digital Ground Pin
17 MCKI
I External Master Clock Input Pin
18 MCKO
O Master Clock Output Pin
19 SPN
O Speaker Amp Negative Output Pin
20 SPP
O Speaker Amp Positive Output Pin
21 HVDD
- Headphone & Speaker Amp Power Supply Pin
22 HVSS
- Headphone & Speaker Amp Ground Pin
23 HPR
O Rch Headphone-Amp Output Pin
24 HPL
O Lch Headphone-Amp Output Pin
25 MUTET
O
Mute Time Constant Control Pin
Connected to HVSS pin with a capacitor for mute time constant.
26
ROUT
RCN
O Rch Stereo Line Output Pin (RCV bit = “0”: Single-ended Stereo Output)
O Receiver-Amp Negative Output Pin (RCV bit = “1”: BTL output)
27
LOUT
RCP
O Lch Stereo Line Output Pin (RCV bit = “0”: Single-ended Stereo Output)
O Receiver-Amp Positive Output Pin (RCV bit = “1”: BTL output)
28
MIN
LIN3
I Mono Signal Input Pin (AIN3 bit = “0”: PLL is available)
I Lch Analog Input 3 Pin (AIN3 bit = “1”: PLL is not available)
29
RIN2
IN2−
I Rch Analog Input 2 Pin (MDIF2 bit = “0”: Single-ended Input)
I Rch Negative Input 2 Pin (MDIF2 bit = “1”: Full-differential Input)
30
LIN2
IN2+
I Lch Analog Input 2 Pin (MDIF2 bit = “0”: Single-ended Input)
I Rch Positive Input 2 Pin (MDIF2 bit = “1”: Full-differential Input)
31
LIN1
IN1−
I Lch Analog Input 1 Pin (MDIF1 bit = “0”: Single-ended Input)
I Lch Negative Input 1 Pin (MDIF1 bit = “1”: Full-differential Input)
32
RIN1
IN1+
I Rch Analog Input 1 Pin (MDIF1 bit = “0”: Single-ended Input)
I Lch Positive Input 1 Pin (MDIF1 bit = “1”: Full-differential Input)
Note 1. All input pins except analog input pins (MIN/LIN3, LIN1, RIN1, LIN2, RIN2, RIN3) should not be left floating.
Note 2. AVDD or AVSS voltage should be input to I2C pin.
MS0478-E-02
-5-
2010/11

5 Page





AK4343 arduino
[AK4343]
Parameter
min t yp max Units
Stereo Input: LIN2/RIN2 pins; LIN3/RIN3 pins (AIN3 bit = “1”)
Maximum Input Voltage (Note 22)
- 1.98 -
Vpp
Gain
LIN/RIN Æ LOUT/ROUT LOVL bit = “0”
−4.5
0 +4.5
dB
LOVL bit = “1”
-
+2
- dB
LIN/RIN Æ HPL/HPR
HPG bit = “0”
−4.5
0 +4.5
dB
HPG bit = “1”
-
+3.6
- dB
LIN/RIN Æ SPP/SPN
ALC bit = “0”, SPKG1-0 bits = “00”
−6.09
−1.59
+2.91 dB
ALC bit = “0”, SPKG1-0 bits = “01”
-
+0.41
- dB
ALC bit = “0”, SPKG1-0 bits = “10”
-
+4.63
- dB
ALC bit = “0”, SPKG1-0 bits = “11”
-
+6.63
- dB
ALC bit = “1”, SPKG1-0 bits = “00”
-
+0.41
- dB
ALC bit = “1”, SPKG1-0 bits = “01”
-
+2.41
- dB
ALC bit = “1”, SPKG1-0 bits = “10”
-
+6.63
- dB
ALC bit = “1”, SPKG1-0 bits = “11”
-
+8.63
- dB
Power Supplies:
Power-Up (PDN pin = “H”)
All Circuit Power-up:
AVDD+DVDD (Note 23) -
12 18 mA
HVDD: HP-Amp Normal Operation
No Output (Note 24)
-5
8 mA
HVDD: SPK-Amp Normal Operation
No Output (Note 25)
- 11
30 mA
Power-Down (PDN pin = “L”) (Note 26)
AVDD+DVDD+HVDD
- 10 100 μA
Note 22. Output voltage is proportional to AVDD voltage. Vout = 0.6 x AVDD (typ).
Note 23. PLL Master Mode (MCKI=12.288MHz) and PMDAC = PMLO = PMHPL = PMHPR = PMVCM = PMPLL =
MCKO = PMMIN = M/S = PMMICL = PMMICR bits = “1”.
AVDD=9mA(typ), DVDD=3mA(typ).
EXT Slave Mode (PMPLL = M/S = MCKO bits = “0”): AVDD=6mA(typ), DVDD=2mA(typ).
Note 24. PMDAC = PMLO = PMHPL = PMHPR = PMVCM = PMPLL = PMMIN bits = “1” and PMSPK bit = “0”.
Note 25. PMDAC = PMLO = PMSPK = PMVCM = PMPLL = PMMIN bits = “1” and PMHPL = PMHPR bits = “0”.
Note 26. All digital input pins are fixed to DVDD or DVSS.
MS0478-E-02
- 11 -
2010/11

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