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PDF AK7736A Data sheet ( Hoja de datos )

Número de pieza AK7736A
Descripción 2Ch SRCAudio - HF DSP
Fabricantes AKM 
Logotipo AKM Logotipo



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[AK7736A]
AK7736A
Audio/HF DSP with 2Ch SRC
GENERAL DESCRIPTION
The AK7736A is a highly integrated audio digital signal processor with integrated 2ch SRC. It includes
internal memories for digital audio p rocessing, that allows surround effect process, time alignment and
parametric equalizing. More ove r, the AK7736A can process b oth data and filter coefficients as floatin g
point data so that high accuracy IIR/FIR filter performance can be achiev ed easily. The AK7736A ca n
operate a ha nds-free software by AKM as well as sound processing, by programs dow nloaded via the
microprocessor interface.
FEATURES
DSP Block
- Word length: 24-bit
- Machine Cycle: 8.1 ns (2560step/fs; fs = 48kHz)
- Step
fs=48kHz: Maximum 2560 step
fs=8kHz: Maximum 15360step
fs=16kHz: Maximum 7680step
- Multiplication: 20 x 24 44-bit (Double precision arithmetic available)
- Divider 20 / 20 20-bit (floating point normalization function)
- ALU: 48-bit arithmetic and logic operation (overflow margin 4-bit)
- Shift: Multiple DBUS ±15bit Shift with indirect shifting function
- Program RAM (PRAM): 6144word x 36-bit
- Coefficient RAM (CRAM): 4096word x 24-bit
- Data RAM (DRAM): 4096 x 24-bit (Variable Bank Size)
- Offset Register (OFREG): 32word x 15-bit
- Delay RAM (DLRAM): 16384word x 24-bit (Variable Bank Size)
- Register: 48-bit × 4 (ACC) [ALU]
24-bit × 12 (TMP) [DBUS connection]
24-bit × 6 level stack (PTMP) [DBUS connection]
Stereo 24-bit SRC
-SRC: FSI=8kHz~96kHz / FSO=8kHz~96kHz (FSO/FSI = 0.167~6.0)
Mono 24-bit Simple SRC
-FSCONV: FSI=44.1kHz~48kHz / FSO=8kHz~16kHz
Digital Interface Input/Output
- 8ch Serial Data Inputs
- 8ch Serial Data Outputs
- Sampling Frequency: 8~96kHZ
Microcontroller Interface: SPI, I2CBUS (400kHz Fast-Mode)
PLL
Power Supply:
-VDD 3.0~3.6V typ 3.3V (Internal Regulator)
-TVDD 1.7~3.6V (1~8pin)
Operating Temperature Range: -40°C ~ 85°C
Package: 48pin LQFP
MS1484-E-00-PB
-
1-
2012/12
http://www.Datasheet4U.com

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AK7736A pdf
[AK7736A]
PIN/FUNCTION
No Nam e I/O
Function
Classification
1 TESTI1 I Test Pin (Internal pull-down)
Test
This pin must be connected to VSS.
2 SDOUT2B O Serial Data2 B Output Pin
Serial Data
3 SDOUT1 O Serial Data1 Output Pin
4 SDIN1
I Serial Data1 Input Pin
Serial Data
5 SDIN2B I Serial Data2 B Input Pin
6 TESTI3 I Test Pin (Internal pull-down)
Test
This pin must be connected to VSS
7 BITCLK1 I/O Serial Bit Clock Pin 1 (Internal pull-down)
System Clock
8 LRCLK1 I/O LR Channel Select Clock Pin 1 (Internal pull-down)
9 TVDD
- Power Supply Pin for 1pin-8pin I/O 1.7~3.6V
Power Supply
10 VSS
- Ground Pin 0V
11 XTI
I Crystal Oscillator Input Pin
System Clock
Connect a crystal oscillator between this pin and the XTO pin, or input an
external clock to the XTI pin.
12 XTO
O Crystal Oscillator Output Pin
When a crystal oscillator is used, connect it between XTI and XTO. When
an external clock is used, leave this pin open.
13 SDOUT4 O Serial Data4 Output Pin
Serial Data
14 SDOUT3 O Serial Data3 Output Pin
15 SDOUT2A O Serial Data2 A Output Pin
16 RDY
O RDY Pin
Status
17 VSS
- Ground Pin 0V
Power Supply
18 VDD
19 I2CSEL
- Power Supply Pin 3.0~3.6V (typ. 3.3V)
I I2C BUS Select Pin
I2C
I2CSEL= “L”: SPI Interface
I2CSEL= “H”: I2CBUS Interface
I2CSEL should be connected to “L” (VSS) or “H” (VDD).
20 PDN
I Power Down N Pin
Power Down
The AK7736A is powered-down by this pin.
This pin must be set to “L” when power-up the AK7736A
21 SDIN2A I Serial Data2 A Input Pin
Serial Data
22 LRCLKO O LR Channel Select Clock Pin
System Clock
23 BITCLKO O Serial Bit Clock Output Pin
24 CLKO
O Clock Output Pin
Clock Output
25 STO
O Status Output Pin
Status
26 SO
O Control Data Output Pin for Microprocessor Interface
Microprocessor
Hi-Z output when the CSN pin = “H”
Interface
27 LRCLKI2 I LR Channel Select Clock Pin 2 (for FSCONV)
System Clock
JX2 I External Conditional Jump Pin 2
Conditional Input
28 BITCLKI2 I Serial Bit Clock Input Pin 2 (for FSCONV)
System Clock
JX1 External Conditional Jump Pin 1
Conditional Input
29 SDIN4
I Serial Data4 Input Pin
Serial Data
MS1484-E-00-PB
-
5-
2012/12

5 Page





AK7736A arduino
[AK7736A]
SWITCHING CHARACTERISTICS
System Clock
(Ta= -40°C~85°C; VDD=3.0~3.6V, TVDD=1.7~3.6V, VSS =0V; CL=20pF)
Parameter
Symbol
a) with a Crystal Oscillator
CKM[2:0]bits=0h fXT
I
CKM[2:0]bits=1h fXT
I
b) with an External Clock
Duty Cycle
CKM[2:0]bits=0h,2h fXT
40
I 11.0
CKM[2:0]bits=1h fXT
I 16.5
LRCLK1 Frequency
(Note 15) fs
8
min typ
11.2896
12.288
16.9344
18.432
MH
50
11.2896
12.288
16.9344
18.432
60
12.4 M
18.6 M
96
max
MHz
z
%
Hz
Hz
kHz
BITCLK1 Frequency
(Note 16)
32,48,64
fs
High Level Width
Low Level Width
Frequency fB
tBCLKH
tBCLKL
CLK
64
64
0.23
3.072
ns
ns
6.2 MHz
LRCLKI2 Frequency (FSCONV)
(Note 17) fs 44
.1
48 kHz
BITCLKI2 Frequency (FSCONV) (Note 18)
32,48,64,128
fs
High Level Width
Low Level Width
Frequency fB
tBCLKH
tBCLKL
CLK
64
64
1.25
3.072
ns
ns
6.2 MHz
LRCLKI3 Frequency (SRC)
fs 8
96 kHz
BITCLKI3 Frequency (SRC)
32,48,64,128
fs
High Level Width
Low Level Width
Frequency fB
tBCLKH
tBCLKL
CLK
32
32
0.23
3.072
ns
ns
12.4 MHz
Note 15. LRCLK1 frequency and sampling rate (fs) should be the same.
Note 16. When BITCLK1 is used as a master clock reference clock, it should be synchronized with LRCLK1, and its
frequency should be fixed.
Note 17. fs=8~48kHz in CKM mode 4.
Note 18. 128fs is inhibited in CKM mode 4.
Power Down
(Ta= -40°C~85°C; VDD=3.0~3.6V, TVDD=1.7~3.6V, VSS =0V)
Parameter
Symbol
PDN
(Note 19) t
RST
Note 19. The PDN pin must be “L” when power up the AK7736A.
min typ
600
max Unit
ns
MS1484-E-00-PB
-
11 -
2012/12

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