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NVTFS4824N 데이터시트 PDF




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기능 Power MOSFET ( Transistor )
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NVTFS4824N 데이터시트, 핀배열, 회로
NVTFS4824N
Power MOSFET
30 V, 4.7 mW, 46 A, Single NChannel
Features
Small Footprint (3.3 x 3.3 mm) for Compact Design
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
NVTFS4824NWF Wettable Flanks Product
AECQ101 Qualified and PPAP Capable
These Devices are PbFree and are RoHS Compliant
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value
Unit
DraintoSource Voltage
GatetoSource Voltage
Continuous Drain Cur-
r2e,n3t,R4Y) Jmb (Notes 1,
Power Dissipation
RYJmb (Notes 1, 2, 3)
Steady
State
Tmb = 25°C
Tmb = 100°C
Tmb = 25°C
Tmb = 100°C
Continuous Drain Cur-
rent
& 4)
RqJA
(Notes
1,
3,
Power Dissipation
RqJA (Notes 1, 3)
Steady
State
TA = 25°C
TA = 100°C
TA = 25°C
TA = 100°C
Pulsed Drain Current TA = 25°C, tp = 10 ms
Operating Junction and Storage Temperature
VDSS
VGS
ID
PD
ID
PD
IDM
TJ, Tstg
30
"20
46
33
21
11
18.2
12.8
3.2
1.6
402
55 to
175
V
V
A
W
A
W
A
°C
Source Current (Body Diode)
IS 21 A
Single Pulse DraintoSource Avalanche
Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V,
IL(pk) = 38 A, L = 0.1 mH, RG = 25 W)
EAS 72 mJ
Lead Temperature for Soldering Purposes
(1/8from case for 10 s)
TL 260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
Parameter
Symbol Value Unit
JunctiontoMounting Board (top) Steady
State (Notes 2 and 3)
RYJmb
7.2 °C/W
JunctiontoAmbient Steady State (Note 3)
RqJA
47
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi ( Y) is us ed as required per JESD51 12 for packages in whic h
substantially less than 100% of the heat flows to single case surface.
3. Surfacemounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
4. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
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V(BR)DSS
30 V
RDS(on) MAX
4.7 mW @ 10 V
7.5 mW @ 4.5 V
ID MAX
46 A
NChannel
D (5 8)
G (4)
1
WDFN8
(m8FL)
CASE 511AB
S (1, 2, 3)
MARKING DIAGRAM
1
S
S XXXX
S AYWWG
GG
D
D
D
D
XXXX
A
Y
WW
G
= Specific Device Code
= Assembly Location
= Year
= Work Week
= PbFree Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
May, 2013 Rev. 2
1
Publication Order Number:
NVTFS4824N/D
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NVTFS4824N pdf, 반도체, 판매, 대치품
NVTFS4824N
TYPICAL CHARACTERISTICS
2500
2000
1500
VGS = 0 V
TJ = 25°C
Ciss
10
8
6
QT
1000
4 Qgs
Qgd
500 Coss
0 Crss
0 102 03 0
GATETOSOURCE OR DRAINTOSOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
2
ID = 23 A
TJ = 25°C
0
0 10 20 30
Qg, TOTAL GATE CHARGE (nC)
Figure 8. GatetoSource Voltage vs. Total
Charge
1000
100
VDD = 15 V
ID = 23 A
VGS = 4.5 V
td(off)
60
VGS = 0 V
TJ = 25°C
40
tr
10
tf
td(on)
20
1
1 10 100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
0
0.40 0.50 0.60 0.70 0.80 0.90
VSD, SOURCETODRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage vs. Current
1000
100 1 ms
10 10 ms
1 VGS = 4.5 V
Single Pulse
TC = 25°C
0.1 RDS(on) Limit
Thermal Limit
Package Limit
0.01
0.1 1
100 ms
10 ms
dc
10 100
VDS, DRAINTOSOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
75
ID = 38 A
50
25
0
25 50 75 100 125 150 175
TJ, STARTING JUNCTION TEMPERATURE(°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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NVTFS4824N

Power MOSFET ( Transistor )

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