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PDF 16LF84A Data sheet ( Hoja de datos )
| Número de pieza | 16LF84A | |
| Descripción | 18-pin Enhanced FLASH/EEPROM 8-bit Microcontroller | |
| Fabricantes | Microchip | |
| Logotipo |  |
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M
PIC16F84A
Data Sheet
18-pin Enhanced FLASH/EEPROM
8-bit Microcontroller
© 2001 Microchip Technology Inc.
DS35007B
http://www.Datasheet4U.com
1 page  
PIC16F84A
1.0 DEVICE OVERVIEW
This document contains device specific information for
the op eration of t he PI C16F84A d evice. Add itional
information m ay be fo und in th e PIC micro™ Mid-
Range R eference Manual, (DS33023), which may be
downloaded f rom the M icrochip w ebsite. T he R efer-
ence Manual should be considered a c omplementary
document t o thi s d ata sh eet, and is hig hly re com-
mended rea ding for a better u nderstanding o f th e
device a rchitecture a nd operation of the p eripheral
modules.
The PIC16F84A belongs to the mid-range family of the
PICmicro® microcontroller devices. A block diagram of
the device is shown in Figure 1-1.
The program memory contains 1K words, which trans-
lates t o 1024 i nstructions, si nce e ach 14 -bit p rogram
memory word is the same width as each device instruc-
tion. The data memory (RAM) contains 68 bytes. Data
EEPROM is 64 bytes.
There are also 13 I/O pins that are user-configured on
a pin-to-pin basis. Some pins are multiplexed with other
device functions. These functions include:
• External interrupt
• Change on PORTB interrupt
• Timer0 clock input
Table 1-1 details the pinout of the device with descrip-
tions and details for each pin.
FIGURE 1-1:
PIC16F84A BLOCK DIAGRAM
FLASH
Program
Memory
1K x 14
13
Program Counter
8 Level Stack
(13-bit)
Program
Bus 14
Instruction Register
5 Direct Addr
Data Bus 8
RAM
File Registers
68 x 8
7 RAM Addr
Addr Mux
7 Indirect
Addr
FSR reg
STATUS reg
8
EEPROM Data Memory
EEDATA
EEPROM
Data Memory
64 x 8
TMR0
EEADR
RA4/T0CKI
Instruction
Decode &
Control
Timing
Generation
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
MUX
ALU
W reg
8 I/O Ports
RA3:RA0
RB7:RB1
RB0/INT
OSC2/CLKOUT
OSC1/CLKIN
MCLR VDD, VSS
© 2001 Microchip Technology Inc.
DS35007B-page 3
5 Page 
PIC16F84A
2.3.2 OPTION REGISTER
The O PTION regi ster is a readable and w ritable
register which contains various control bits to configure
the TMR0 /WDT pre scaler, the ex ternal INT int errupt,
TMR0, and the weak pull-ups on PORTB.
Note:
When th e pre scaler is assigned to
the WDT (PSA = ’ 1’), TM R0 h as a 1 :1
prescaler assignment.
REGISTER 2-2:
OPTION REGISTER (ADDRESS 81h)
R/W-1
RBPU
bit 7
R/W-1
INTEDG
R/W-1
T0CS
R/W-1
T0SE
R/W-1
PSA
R/W-1
PS2
R/W-1
PS1
R/W-1
PS0
bit 0
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
RBPU: PORTB Pull-up Enable bit
1 = PORTB pull-ups are disabled
0 = PORTB pull-ups are enabled by individual port latch values
INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of RB0/INT pin
0 = Interrupt on falling edge of RB0/INT pin
T0CS: TMR0 Clock Source Select bit
1 = Transition on RA4/T0CKI pin
0 = Internal instruction cycle clock (CLKOUT)
T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on RA4/T0CKI pin
0 = Increment on low-to-high transition on RA4/T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
PS2:PS0: Prescaler Rate Select bits
Bit Value TMR0 Rate WDT Rate
000 1 : 2
1:1
001 1 : 4
1:2
010 1 : 8
1:4
011
1 : 16
1:8
100
1 : 32
1 : 16
101
1 : 64
1 : 32
110 1 : 128 1 : 64
111 1 : 256 1 : 128
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
’1’ = Bit is set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared x = Bit is unknown
© 2001 Microchip Technology Inc.
DS35007B-page 9
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet 16LF84A.PDF ] | |
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