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PDF LP8720 Data sheet ( Hoja de datos )
| Número de pieza | LP8720 | |
| Descripción | One Step-Down DC/DC and Five Linear Regulators | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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LP8720
November 30, 2009
One Step-Down DC/DC and Five Linear Regulators with I2C
Compatible Interface
General Description
Features
The LP8720 is a multi-function, programmable Power Man-
agement Unit, optimized for sub block power requirement
solution. This device integrates one highly efficient 400 mA
step-down DC/DC converter with Dynamic Voltage Scale
(DVS), five low noise low dropout (LDO) voltage regulators
and a 400 KHz I2C-compatible interface to allow a host con-
troller access to the internal control registers of the LP8720.
The LP8720 additionally features programmable power-on
sequencing.
LDO regulators provide high PSRR and low noise ideally suit-
ed for supplying power to both analog and digital loads. The
package will be the smallest 2.5 mm x 2.0 mm micro SMD
20–bump package.
■ 5 Low Noise LDO’s for up to 300 mA
■ One high-efficiency Synchronous Magnetic Buck
Regulator, IOUT 400 mA
High efficiency PFM mode @low IOUT
Auto Mode PFM/PWM switch
Low inductance 2.2 µH @ 2 MHz clock
Dynamic Voltage Scale control
■ I2C-compatible interface for the controlling of internal
registers
■ 20–bump 2.5 x 2.0 mm micro SMD package
Key Specifications
Applications
■ Cellular Handsets
■ Portable hand-held products
■ Programmable Vout from 0.8V to 2.3V on DC/DC
■ Automatic soft start on DC/DC
■ 200 mV typ Dropout Voltage at 300 mA on LDO’s
■ 2% (typ) Output Voltage accuracy on LDO’s
Typical Application Diagram
© 2009 National Semiconductor Corporation 300675
30067501
www.national.com
http://www.Datasheet4U.com
1 page  
POWER-ON AND POWER-OFF SEQUENCES
Start Up Sequence if DEFSEL=VBATT or DEFSEL=Hi-Z
30067505
tBON 150 µs – Reference and bias turn ON. Min 100 µs max 200 µs.
tS 25 µs – time step. Time step accuracy is defined by OSC frequency accuracy.
Note 1 START UP and SHUT DOWN sequences are defined by registers. Sequences given here are valid if there the registers
are not rewritten via Serial Interface.
Note 2 The timing showed here define time points when LDO’s and BUCK are enabled/disabled. Enabling /disabling process
duration depends on loading conditions. Buck startup duration is 140 µs for no load. LDO startup duration is no more than
35 µs. For details please see LDO’s and BUCK electrical specifications.
Note 3 LDO5 and BUCK are disabled. If LDO5 and/or BUCK are enabled via Serial Interface and startup sequence is not changed
via Serial interface, then LDO5 and BUCK are disabled with no delay from falling edge on EN-pin.
Note 4 At this time point registers 0x09 and 0x0C are reset to POR default values.
Note 5 At this time point registers 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 and 0x08 are reset to POR default values.
5 www.national.com
5 Page 
Support Functions
REFERENCE
LP8720 has internal reference block creating all necessary
references and biasing for all blocks.
OSCILLATOR
There is internal oscillator giving clock to the bucks and to
logic control.
VBATT=3.6V
Parameter
Typ Min Max Unit
Oscillator
2.0 1.9 2.1 MHz
frequency
THERMAL SHUTDOWN
The Thermal Shutdown (TSD) function monitors the chip tem-
perature to protect the chip from temperature damage caused
eg. by excessive power dissipation. The temperature moni-
toring function has two threshold values TSD and TSD_EW
that result in protective actions.
When TSD_EW +125ºC is exceeded, then IRQ_N is set to
low and “1” is written to TSD_EW bit in both STATUS register
and in INTERRUPT register.
If the temperature exceeds TSD +160ºC, then PMU initiates
Emergency Shutdown.
The POWER UP operation after Thermal Shutdown can be
initiated only after the chip has cooled down to the +115ºC
threshold
Parameter
TSD *)
TSD_EW *)
TSD_EW Hysteresis *)
Typ Unit
160 °C
125 °C
10 °C
*) Guaranteed by design.
11 www.national.com
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet LP8720.PDF ] | |
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