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PDF TK7A65D Data sheet ( Hoja de datos )

Número de pieza TK7A65D
Descripción Field Effect Transistor Silicon N Channel MOS Type
Fabricantes Toshiba 
Logotipo Toshiba Logotipo



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TK7A65D
TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (π-MOS)
TK7A65D
Switching Regulator Applications
Low drain-source ON-resistance: RDS (ON) = 0.8 Ω(typ.)
High forward transfer admittance: |Yfs| = 4.5 S (typ.)
Low leakage current: IDSS = 10 μA (max) (VDS = 650 V)
Enhancement mode: Vth = 2.0 to 4.0 V (VDS = 10 V, ID = 1 mA)
Ф3.2 ± 0.2 10 ± 0.3
A
Unit: mm
2.7 ± 0.2
1.14 ± 0.15
Absolute Maximum Ratings (Ta = 25°C)
0.69 ± 0.15
Ф0.2 M A
Characteristics S
Drain-source voltage
Gate-source voltage
Drain current
DC (Note 1)
Pulse (Note 1)
Drain power dissipation (Tc = 25°C)
Single pulse avalanche energy
(Note
2)
Avalanche current
Repetitive avalanche energy (Note 3)
Channel temperature
Storage temperature range
ymbol
VDSS
VGSS
ID
IDP
PD
EAS
IAR 7
EAR 4.5
Tch 150
Tstg
Rating
650 V
±30 V
7
28
45 W
273 mJ
55 to 150
Unit
A
A
mJ
°C
°C
2.54
2.54
12 3
1: Gate
2: Drain
3: Source
JEDEC
JEITA
SC-67
TOSHIBA
2-10U1B
Weight: 1.7 g (typ.)
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability
Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e.
reliability test report and estimated failure rate, etc).
Thermal Characteristics
Characteristics S
Thermal resistance, channel to case
Thermal resistance, channel to ambient
ymbol
Rth (ch-c)
Rth (ch-a)
Max Unit
2.78
62.5
°C/W
°C/W
Note 1:Ensure that the channel temperature does not exceed 150.
Note 2: VDD = 90 V, Tch = 25°C (initial), L = 9.86mH, RG = 25 Ω, IAR = 7 A
Note 3: Repetitive rating: pulse width limited by maximum channel temperature
This transistor is an electrostatic-sensitive device. Handle with care.
1
2
3
1 2011-11-25
http://www.Datasheet4U.com

1 page




TK7A65D pdf
TK7A65D
rth – tw
10
1 Duty=0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
0.001
0.00001
0.0001 0.00
SINGLE PULSE
PDM
t
T
Duty = t/T
Rth (ch-c) = 2.78 °C/W
1 0.01
0.1
1
10
Pulse width t w (s)
Safe Operating Area
100
ID max (pulse) *
10 ID max (continuous)
100 μs *
1 ms *
1
DC operation
Tc = 25°C
0.1
0.01
* Single pulse Tc=25
Curves must be derated
linearly with increase in
temperature.
0.001
0.1 1
10 100
VDSS max
100
Drain-source voltage VDS (V)
0
EAS – Tch
400
320
240
160
80
0
25 50 75 100 125 150
Channel temperature (initial) Tch (°C)
15 V
15 V
BVDSS
IAR
VDD
VDS
Test circuit
RG = 25 Ω
VDD = 90 V, L = 9.86 mH
Waveform
ΕAS
=
1
2
L I2
⋅ ⎜⎜⎝⎛
BVDSS
BVDSS VDD
⎟⎟⎠⎞
5 2011-11-25

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