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PDF DTC34LF86L Data sheet ( Hoja de datos )
| Número de pieza | DTC34LF86L | |
| Descripción | +3.3V LVDS 24Bit Flat Panel Display (FPD) Receiver | |
| Fabricantes | DOESTEK | |
| Logotipo |  |
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DTC34LF8 6L/DTC34LR86L
LVDS Product
DTC34LF86L/DTC34LR86L (Rev. 2.2)
REVISED APR. 2009
+3.3V LVDS 24Bit Flat Panel Display (FPD) Receiver - 85MHz
General Description
The D TC34LF86L/LR86L rec eivers co nvert the L VDS
(Low Voltage Differential Signaling) data streams back
into 28 bit s of CMOS/ TTL dat a with falling edge
(DTC34LF86L) or risin g edge (DTC34LR86L) clock for
convenient int erface with a variet y of L CD p anel
controllers.
A phase-locked transmit clock is transmitte d in p arallel
with the data streams ove r a fif th L VDS link. A
transmitter (DTC34LM85L) w ill inter-o perate w ith a
Falling/Rising edg e rec eiver (DT C34LF86L/LR86L)
without any translation logic.
Using a 8 5 MHz clock, the dat a throu ghputs is 297.5
Mbytes/sec. This chip set is an ide al mean s to solve
EMI and ca ble size problems associat ed with wide,
high speed TTL interfaces.
Features
▓ Wide frequency range : 20 to 85 MHz shift
clock support
▓ Narrow bus (10 lines) reduces cable size
▓ Sing le 3.3V supply
▓ Po wer-Down Mode
▓ Single pixel per clock XGA (1024x768) ready
▓ Supports VGA, SVGA, XGA and SXGA
▓ Up to 297.5 Megabytes/sec bandwidth
▓ Up to 2.38 Gbps throughput
▓ 300mV swing LVDS devices for low EMI
▓ PLL requires no external components
▓ Low profile 56-lead TSSOP package (PB Free)
▓ Comp atible with TIA/EIA-644 LVDS standard
▓ Compatible with the National DS90C386,
T hine THC63LVDF84A
Block Diagram
DTC34LF86L/DTC34LR86L
CMOS/TTL OUTPUTS
8
RED
LVDS DATA
( 140 TO 595Mbit/s
On Each LVDS
Channel )
8
GRN
8
BLU
HSYNC
VSYNC
DE(Data Enable)
CNTL
RCLK+/-
(20MHz ~ 85MHz)
PLL CLKOUT
(20MHz ~ 85MHz)
/PDN(Power Down)
-1-
DOESTEK Co., Ltd.
http://www.Datasheet4U.com
1 page  
DTC34LF8 6L/DTC34LR86L
AC Timing Diagram (Continued)
FIGURE 4. Phase Lock Loop Set Time
/PDN
2V
VCC
3V
RCLK+/-
tRPLLS
CLKOUT
3.6V
2V
FIGURE 5. Receiver Device Operation
RX+/-
tRDP4
tRDP3
tRDP2
tRDP1
tRDP0
tRDP6
tRDP5
Rx0 Rx1 Rx2 Rx3 Rx4 Rx5 Rx6 Rx0 Rx1 Rx2 Rx3 Rx4 Rx5 Rx6
RCLK+
Vdiff=0V
Note : 1) Vdiff = (RL+) - (RL-), .... (RCLK+) - (RCLK-)
- 5 - DOESTEK Co., Ltd.
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet DTC34LF86L.PDF ] | |
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