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74HCT123 데이터시트 PDF




NXP Semiconductors에서 제조한 전자 부품 74HCT123은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 74HCT123 기능
기능 Dual retriggerable monostable multivibrator
제조업체 NXP Semiconductors
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74HCT123 데이터시트, 핀배열, 회로
74HC123; 74HCT123
Dual retriggerable monostable multivibrator with reset
Rev. 10 — 3 December 2015
Product data sheet
1. General description
The 74HC123; 74HCT123 are high-speed Si-gate CMOS devices and are pin compatible
with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC123; 74HCT123 are dual retriggerable monostable multivibrators with output
pulse width control by three methods:
1. The basic pulse is programmed by selection of an external resistor (REXT) and
capacitor (CEXT).
2. Once triggered, the basic output pulse width may be extended by retriggering the
gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By
repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made
as long as desired. Alternatively an output delay can be terminated at any time by a
LOW-going edge on input nRD, which also inhibits the triggering.
3. An internal connection from nRD to the input gates makes it possible to trigger the
circuit by a HIGH-going signal at input nRD as shown in Table 3.
Schmitt-trigger action in the nA and nB inputs, makes the circuit highly tolerant to slower
input rise and fall times.
The 74HC123; 74HCT123 are identical to the 74HC423; 74HCT423 but can be triggered
via the reset input.
2. Features and benefits
DC triggered from active HIGH or active LOW inputs
Retriggerable for very long pulses up to 100 % duty factor
Direct reset terminates output pulse
Schmitt-trigger action on all inputs except for the reset input
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from 40 C to +85 C and from 40 C to +125 C




74HCT123 pdf, 반도체, 판매, 대치품
NXP Semiconductors
74HC123; 74HCT123
Dual retriggerable monostable multivibrator with reset
5. Pinning information
5.1 Pinning
$ 
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5' 
4 
4 
&(;7 
5(;7&(;7 
*1' 
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+&7
 9&&
 5(;7&(;7
 &(;7
 4
 4
 5'
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 $
DDD
Fig 5. Pin configuration for SO16, SSOP16 and
TSSOP16
+&
WHUPLQDO
LQGH[DUHD
% 
5' 
4 
4 
&(;7 
5(;7&(;7 
9&& 
 5(;7&(;7
 &(;7
 4
 4
 5'
 %
DDI
7UDQVSDUHQWWRSYLHZ
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to VCC.
Fig 6. Pin configuration for DHVQFN16
5.2 Pin description
Table 2. Pin description
Symbol
Pin
1A 1
1B 2
1RD
3
1Q 4
2Q 5
2CEXT
6
2REXT/CEXT
7
GND
8
2A 9
2B 10
2RD
11
2Q 12
1Q 13
1CEXT
14
1REXT/CEXT
15
VCC 16
Description
negative-edge triggered input 1
positive-edge triggered input 1
direct reset LOW and positive-edge triggered input 1
active LOW output 1
active HIGH output 2
external capacitor connection 2
external resistor and capacitor connection 2
ground (0 V)
negative-edge triggered input 2
positive-edge triggered input 2
direct reset LOW and positive-edge triggered input 2
active LOW output 2
active HIGH output 1
external capacitor connection 1
external resistor and capacitor connection 1
supply voltage
74HC_HCT123
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 3 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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74HCT123 전자부품, 판매, 대치품
NXP Semiconductors
74HC123; 74HCT123
Dual retriggerable monostable multivibrator with reset
Table 6. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
CI input
capacitance
- 3.5 -
-
-
-
- pF
74HCT123
VIH HIGH-level VCC = 4.5 V to 5.5 V
input voltage
2.0 1.6 -
2.0
-
2.0
-V
VIL LOW-level VCC = 4.5 V to 5.5 V
input voltage
- 1.2 0.8
-
0.8
-
0.8 V
VOH HIGH-level VI = VIH or VIL; VCC = 4.5 V
output voltage IO = 20 A
4.4 4.5 -
4.4
-
4.4
-V
IO = 4 mA
3.98 4.32 - 3.84
-
3.7
-V
VOL
LOW-level
VI = VIH or VIL; VCC = 4.5 V
output voltage IO = 20 A
- 0 0.1 -
0.1
-
0.1 V
IO = 4.0 mA
- 0.15 0.26 - 0.33 -
0.4 V
II
input leakage VI = VCC or GND; VCC = 5.5 V -
- 0.1 -
1.0
-
1.0 A
current
ICC supply current VI = VCC or GND; IO = 0 A;
- - 8.0 -
80
-
160 A
VCC = 5.5 V
ICC
additional
per input pin; IO = 0 A;
supply current VI = VCC 2.1 V;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V
pins nA, nB
- 35 125 - 160 -
170 A
pin nRD
- 50 180 - 225 -
245 A
CI input
capacitance
- 3.5 -
-
-
-
- pF
74HC_HCT123
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 3 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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